CSR Bit Fields

RISC-V mhpmcounter22h CSR Register

Address 0xB96Privilege MachineAccess RW / RV32 high-half / 32-bitMachine counters and performance-monitoring CSRs

mhpmcounter22h at 0xB96 is the RV32 machine high-half CSR for bits 63:32 of mhpmcounter22.

Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
Field Map

Understand mhpmcounter22h By Bit Fields

0 key fields
Official Basis & Search Notes

mhpmcounter22h is the RV32 high-half access CSR for bits 63:32 of mhpmcounter22; its event meaning is still determined by mhpmevent22.

mhpmcounter22 is a WARL register with up to 64 bits of precision; RV32 accesses it through low/high halves mhpmcounter22/mhpmcounter22h.
On RV32, the high-half CSR accesses bits 63:32 and the low-half CSR accesses bits 31:0.
mhpmcounter22h does not select the event; event selection is in mhpmevent22.

What To Check First When Reading This CSR

  • - mhpmcounter22h exists only on RV32.
  • - mhpmcounter22 is a WARL register with up to 64 bits of precision; event meanings are platform-defined.
  • - mcountinhibit.HPM22 controls only whether mhpmcounter22 increments, not its accessibility.

Risk Checks Before Writing

  • - On RV32, writing mhpmcounter22h changes only bits 63:32 of mhpmcounter22.
  • - A legal implementation may make both mhpmcounter22 and its mhpmevent22 selector read-only zero.

Put It Back Into A Real Flow

1

On RV32, access mhpmcounter22h and mhpmcounter22 separately.

2

The high and low halves correspond to bits 63:32 and 31:0 of one WARL counter.

3

Use mhpmevent22 to determine the platform-selected event for the counter.

FAQ

Can mhpmcounter22h be accessed from any privilege level?

No. The official CSR table lists mhpmcounter22h as an RV32-only Machine read/write CSR.

Is mhpmcounter22h a separate counter?

No. It is only the RV32 access CSR for the upper 32 bits of mhpmcounter22.