RV32 vs RV64
Focus on register width, load/store behavior, 32-bit word operations, and common ABI data models so beginners can avoid the most common pitfalls at a glance.
Cheat Sheet — Key Differences
The 6 most critical differences in one glance.
| Dimension | RV32 | RV64 |
|---|---|---|
| Register Width | 32-bit | 64-bit |
| Common ABI Data Model | ILP32: int/long/pointer usually 4 bytes | LP64: long/pointer usually 8 bytes |
| lw Behavior | Loads a 32-bit value; the result width remains 32 bits | Loads a 32-bit value and sign-extends it to 64 bits |
| Common Pointer Load | lw rd, offset(rs1) | ld rd, offset(rs1) |
| Common Pointer Store | sw rs2, offset(rs1) | sd rs2, offset(rs1) |
| RV64 32-bit Word Ops | add, sub, sll… | addw, subw, sllw… (w suffix) |
Key Comparisons
# 32-bit additionadd a0, a1, a2 # 32-bit addition# XLEN-wide add (64-bit on RV64)add a0, a1, a2 # XLEN-wide add (64-bit on RV64)# add low 32 bits, sign-extend to 64addw a0, a1, a2 # add low 32 bits, sign-extend to 64# add immediate to low 32 bits, sign-extendaddiw a0, a1, 1 # add immediate to low 32 bits, sign-extend# t0 = 32-bit value from memorylw t0, 0(sp) # t0 = 32-bit value from memory# t0 = sign-extended (32 → 64 bit)lw t0, 0(sp) # t0 = sign-extended (32 → 64 bit)# t0 = zero-extended (32 → 64 bit)lwu t0, 0(sp) # t0 = zero-extended (32 → 64 bit)# load a 32-bit pointer/addresslw t0, 0(sp) # load a 32-bit pointer/address# store a 32-bit pointer/addresssw t0, 0(sp) # store a 32-bit pointer/address# load a 64-bit pointer/addressld t0, 0(sp) # load a 64-bit pointer/address# store a 64-bit pointer/addresssd t0, 0(sp) # store a 64-bit pointer/addressThis page is organized with reference to the official RISC-V documents below for architecture, ABI, CSR, and pseudo-instruction notes; platform or OS ABI differences still need to be checked against their own specifications.
Base integer ISA, RV32/RV64, instruction formats, load/store, control flow, and atomic instruction semantics.
Privilege modes, trap entry/return, CSRs, address translation, PMP, and interrupt-related architectural state.
Assembly syntax, pseudo-instructions, common expansions, register names, and programmer-visible conventions.
Procedure calling convention, register preservation, stack alignment, ELF, DWARF, and relocation rules.