CSR Bit Fields

RISC-V mscratchcsw CSR Register

Address 0x348Privilege MachineAccess Non-standard / implementation-defined / Non-standard / implementation-definedMachine AIA, timer, and indirect interrupt CSRs

mscratchcsw (0x348) is not listed in the current official RISC-V privileged/AIA CSR tables; this page keeps only a compatibility index and provides no portable access class, width, or bit-field definition.

Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
Field Map

Understand mscratchcsw By Bit Fields

0 key fields
Official Basis & Search Notes

mscratchcsw is not a current official-manual-confirmed standard AIA CSR. This page is only for search and compatibility review; access class, width, fields, and side effects must come from target implementation documentation.

The current official privileged CSR listing does not list this name/address.
The current official AIA CSR table does not list this name either.
Therefore this page no longer keeps seed-data RW/XLEN or VALUE fields, avoiding any implication of portable standard semantics.

What To Check First When Reading This CSR

  • - This CSR is not listed in the current official RISC-V privileged CSR table or AIA CSR table.
  • - This page does not define access class, register width, or bit fields; interpret it only when target implementation documentation explicitly declares support.

Risk Checks Before Writing

  • - Do not read or write this CSR in portable code.
  • - If a specific implementation supports this address, all read/write rules, fields, and side effects must come from that implementation documentation.

Put It Back Into A Real Flow

1

First check current official RISC-V manuals for standardization.

2

If official manuals do not list it, use this page only as a name/address compatibility index.

3

For actual use, rely on target chip, platform, or implementation documentation and do not infer fields from this page.

FAQ

Can mscratchcsw be programmed as a standard AIA CSR?

Not based on this page alone. The current official AIA table does not list this CSR; actual use must rely on target implementation documentation.