Does C.MOP.1 write a register by default?
No. The official Zcmop rule says C.MOP.n writes no register by default.
C.MOP.1
RISC-V C.MOP.1 Instruction Details
Instruction ManualC-typeZcmop 16-bit C.MOP.1; by default it writes no register and may be redefined to read x1.
Instruction Syntax
c.mop.1
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
ZcmopMicroarch Hints
Instruction Behavior
C.MOP.1 is a Zcmop compressed may-be-operation. Its default official behavior writes no register; the encoding allows a future extension to redefine it as reading the implicit register x1. The recommended assembly syntax is the nullary c.mop.1. Zcmop depends on Zca.
Quick Understanding & Search Notes
C.MOP.1 is a nullary 16-bit MOP that by default changes no register state; it reserves compatible redefinition space for future extensions.
Zcmop defines only the eight odd-numbered C.MOP.n instructions from 1 through 15.
The default differs from Zimop MOP.R.n, which writes zero to rd.
Common Usage Scenarios
Comparison & Detection
Understand this scenario with real code like «c.mop.1».
Compressed & Code Size
Understand this scenario with real code like «c.mop.1».
Type Conversion
Understand this scenario with real code like «c.mop.1».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is C-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
By default C.MOP.n writes no rd; this differs from Zimop MOP.R/MOP.RR, which write zero to rd.
Do not rely on useful C.MOP behavior in ordinary software unless a target extension explicitly redefines the encoding.
This encoding may be redefined by a future extension to read implicit register x1.
FAQ
What is the implicit register for C.MOP.1?
A future redefinition may read x1.