FMINM.S

RISC-V FMINM.S Instruction Details

Instruction ManualR-type

Single-precision floating-point minimum: either NaN gives canonical NaN; otherwise select the smaller value, with -0.0 below +0.0.

Instruction Syntax

fminm.s rd, rs1, rs2
Operand Breakdown
rd, rs1, rs2: FP registers f0–f31 or their ABI names; f0 is writable and rd may overlap a source.
No rm, rs3, or immediate; funct3=010 selects Zfa FMINM, with canonical NaN for a NaN result.
ZfaFFloating-Point Arithmetic

Instruction Behavior

FMINM.S is the Zfa single-precision IEEE 754-2019 minimum operation: if either input is NaN, the result is canonical NaN; otherwise it returns the numerically smaller operand and handles -0.0 versus +0.0 as specified.

FMINM.S Decode And Execute Animation

Shows the Zfa + F-extension single-precision OP-FP flow: decode fields, read FP operands, perform FMINM semantics, then write rd.

rd
rs1
rs2
fminm.s
,
,
Execution Context
FLEN>=32 / fmt=S (00)
funct3: FMINM (either NaN is canonical NaN)
fflags: initial 0
31..27
26..25
24..20
19..15
14..12
11..7
6..0
00101
FMINM
00
fmt=S
01100
rs2
01011
rs1
010
funct3=010
01010
rd
1010011
OP-FP
Execution Data Path
instruction
0x28C5A553
opcode
1010011 -> OP-FP
funct5/fmt
00101 + S(00) -> FMINM.S
funct3
010 -> FMINM (either NaN is canonical NaN)
rd/rs
fa0(f10) / fa1(f11) / fa2(f12)
read
Source registers not read yet
FP op
Awaiting Execute
write
Not written yet; initial fflags=0
Current Step

Fetch: show the 32-bit OP-FP encoding

The word is split as an R-type OP-FP instruction; single-precision OP-FP instructions use opcode 1010011.

encoding: 0x28C5A553
syntax : fminm.s fa0(f10), fa1(f11), fa2(f12)
result : Not written yet; initial fflags=0

The default example shows the official signed-zero ordering: -0.0 is less than +0.0. If either input is NaN, Zfa FMINM/FMAXM returns canonical NaN; a signaling NaN sets NV.

Single-precision Calculation
rs1
fa1(f11) = -0.0
rs2
fa2(f12) = 0.0
result
Awaiting Execute

The default example shows the official signed-zero ordering: -0.0 is less than +0.0. If either input is NaN, Zfa FMINM/FMAXM returns canonical NaN; a signaling NaN sets NV.

Assumes required extensions and FS enabled, valid NaN-boxing, and initial fflags=0. Finite inputs use the exact whitelist; signed zeros, infinities, qNaN, and sNaN are supported. Other inputs stop execution. One source register has one initial value; rd may overlap a source and f0 accepts writes. Steps are teaching views.

This animation shows only Zfa + F-extension ISA-visible OP-FP encoding, example numeric results, and fflags relationship; it does not model FPU pipelines, latency, every IEEE 754 corner case, or microarchitecture.

Quick Understanding & Search Notes

FMINM.S returns canonical NaN if either input is NaN; ordinary FMIN returns canonical NaN only when both inputs are NaNs.

-0.0 and +0.0 are ordered: -0.0 is less than +0.0.
RV32/RV64 with Zfa+F and FP state enabled; 32-bit OP-FP encoding: funct5=00101, fmt=00, funct3=010, opcode=1010011; no rm, rs3, or immediate.
When the format is narrower than FLEN, an input whose upper bits are not all ones is treated as canonical NaN; narrower results get upper ones. f0 is writable, and destination/source overlap uses source values before writeback.

Common Usage Scenarios

Floating-Point Compare

Assume required extensions and FP state enabled, f1=-0.0 and f2=+0.0 in this format (validly NaN-boxed for wider FLEN), and initial fflags=0: the example writes f0=-0.0, with fflags still 0. Either NaN gives canonical NaN; sNaN also sets NV.

Numerical Computing

Assume required extensions and FP state enabled, f1=-0.0 and f2=+0.0 in this format (validly NaN-boxed for wider FLEN), and initial fflags=0: the example writes f0=-0.0, with fflags still 0. Either NaN gives canonical NaN; sNaN also sets NV.

Pre-Use Checklist

Syntax Check
  • rd, rs1, rs2: FP registers f0–f31 or their ABI names; f0 is writable and rd may overlap a source.
  • No rm, rs3, or immediate; funct3=010 selects Zfa FMINM, with canonical NaN for a NaN result.
Semantic Check
  • Confirm required extensions and FP state are enabled, source formats match, and inputs in wider FLEN are correctly NaN-boxed.
  • Select by this page's NaN and signed-zero rules; only sNaN sets NV, existing fflags are not cleared, and rm is unused.

Pitfalls / Common Confusions

Unlike ordinary FMIN/FMAX, FMINM/FMAXM returns canonical NaN if either input is NaN.
Quiet NaNs alone do not set NV; a signaling NaN sets NV. Existing fflags are not cleared, and setting an FP exception flag does not itself trap.
-0.0 is considered less than +0.0.

FAQ

What is the main difference from the ordinary form?

The M form returns canonical NaN if either input is NaN; the ordinary form returns the other non-NaN operand when exactly one input is NaN.

Does FMINM.S round?

It performs no arithmetic rounding and has no rm operand. Without NaNs it selects the smaller operand; either NaN instead produces canonical NaN.