Does MIN return 0 or 1?
No. It returns the original XLEN-bit value selected from rs1 or rs2 by the comparison rule.
MIN
RISC-V MIN Instruction Details
Instruction ManualR-typeReturn the minimum of rs1 and rs2 using signed comparison.
Instruction Syntax
min rd, rs1, rs2
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
BZbbBit ManipulationInteger Operation
Instruction Behavior
MIN is a Zbb integer min/max instruction. It compares x[rs1] and x[rs2] as signed values and writes the original XLEN-bit value that is smaller under that ordering to rd.
MIN Decode And Execute Animation
Starts with machine-code field decoding, then shows operand reads, instruction-specific execution, and ISA-visible state update.
rd
rs1
rs2
min
,
,
Execution Context
a6(x16)
0xFFFFFFF0
sp(x2)
0x00000002
31..25
24..20
19..15
14..12
11..7
6..0
0000101
funct7
00010
rs2
10000
rs1
100
funct3
00101
rd
0110011
opcode
Execution Data Path
instruction
0x0A2842B3
opcode
0110011 -> OP
funct3
100 -> MIN
funct7
0000101 -> Zbb MIN/MAX selector
rd / rs1 / rs2
t0(x5) / a6(x16) / sp(x2)
integer comparison and selection
signed: 0xFFFFFFF0 (-16) < 0x00000002 (2) -> select rs1 = 0xFFFFFFF0
x5
t0(x5) = 0xFFFFFFF0
Current Step
Concept Step: receive the 32-bit instruction encoding
The machine code is split by the current instruction format; the animation starts from encoding/decode.
encoding: 0x0A2842B3
syntax : min t0(x5), a6(x16), sp(x2)
result : t0(x5) = 0xFFFFFFF0
Architectural Result
t0(x5) = 0xFFFFFFF0
This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.
Quick Understanding & Search Notes
MIN selects between rs1 and rs2 using signed ordering and returns the selected original XLEN-bit pattern, not a comparison bit.
Forms with U use unsigned ordering; forms without U use two's-complement signed ordering.
MIN operands and result are XLEN-wide integer-register values.
Common Usage Scenarios
Integer Comparison
Understand this scenario with real code like «min x10, x11, x12 ; x10 = signed_min(x11, x12)».
Integer Min/Max
Understand this scenario with real code like «min x10, x11, x12 ; x10 = signed_min(x11, x12)».
Pre-Use Checklist
Syntax Check
- Verify rd, rs1, rs2 (and rs3) are valid GPRs.
- Confirm funct3 and funct7 encoding is correct.
Semantic Check
- Check if the result affects subsequent branches or address calculations.
- Ensure the rd register is not overwritten by another instruction.
Pitfalls / Common Confusions
MIN uses signed comparison; use MINU for unsigned comparisons.
The result is the selected original register value, not Boolean 0/1.
MIN and MINU differ only in comparison signedness; the selected original bit pattern is written.
FAQ
How do I choose between MIN and MINU?
Use the non-U form for signed two's-complement ordering; use the U form when data is ordered as unsigned.