Does ZIP access memory?
No. ZIP interleaves the two halves of the source integer register into the destination integer register.
ZIP
RISC-V ZIP Instruction Details
Instruction ManualI-typeRV32 bit interleave (Zbkb), RV32-only.
Instruction Syntax
zip rd, rs1
Syntax: zip rd, rs1; integer x0–x31 or ABI names, without an assembly immediate.
32-bit OP-IMM: imm[11:0]=000010001111, funct3=001, opcode=0010011; the immediate field is a fixed selector.
RV32 Zbkb only; low source bits fill even result bits and high source bits fill odd result bits, reversing UNZIP.
An x0 source is zero and writes to x0 are discarded. Overlap reads values before writeback; equal source registers share one value. No memory access.
ZbkbBit Manipulation
Instruction Behavior
ZIP (Zbkb, RV32-only) interleaves the low and high halves of the source register into the destination: for i=0..15, rd[2*i]=rs1[i] and rd[2*i+1]=rs1[i+16]. It is the inverse of UNZIP and is useful for SHA3 bit interleaving on 32-bit architectures.
ZIP Decode And Execute Animation
RV32 interleaves the low and high halves of rs1 into rd's even and odd bit positions.
Execution Context
XLEN=32 (RV32)
x0 is always zero; source values are read before writeback. Teaching steps are not processor cycles.
imm[11:0]
31..20
000010001111rs1
19..15
01011funct3
14..12
001rd
11..7
01010opcode
6..0
0010011Current calculation
rd[2i] = rs1[i]; rd[2i+1] = rs1[i+16], i = 0..15
0xD2C4B8A1 -> 0xE748E421
Step: decode
Shows the instruction's fixed and register fields.
x[a0] <- 0xE748E421
1/4: decode
Quick Understanding & Search Notes
ZIP is an RV32 Zbkb bit-interleaving instruction: the low 16 source bits fill even result bits and the high 16 source bits fill odd result bits.
The official encoding and semantics are RV32-only.
Reads the source integer register and writes the destination integer register without accessing memory.
Common Usage Scenarios
Register bit interleaving
RV32 Zbkb, x11=0x00010001: zip x10, x11 gives x10=0x00000003.
SHA3 bit interleaving
RV32 Zbkb, x11=0x00010001: zip x10, x11 gives x10=0x00000003.
Pre-Use Checklist
Syntax Check
- Syntax: zip rd, rs1; integer x0–x31 or ABI names, without an assembly immediate.
- 32-bit OP-IMM: imm[11:0]=000010001111, funct3=001, opcode=0010011; the immediate field is a fixed selector.
Semantic Check
- RV32 Zbkb only; low source bits fill even result bits and high source bits fill odd result bits, reversing UNZIP.
- An x0 source is zero and writes to x0 are discarded. Overlap reads values before writeback; equal source registers share one value. No memory access.
Pitfalls / Common Confusions
ZIP is defined only on RV32; there is no RV64 form.
Even bits come from the source low half and odd bits from the source high half; do not confuse it with byte shuffle.
FAQ
Which extension contains ZIP?
It belongs to the Zbkb cryptographic bit-manipulation extension.