Register Guide
RISC-V v0 / v0 Register: Vector mask/data register
v0 is an RVV vector register; element count and layout are controlled by vl, vtype, VLEN, and LMUL. v0 also serves as the mask register for masked vector operations (v0.t).
ABI name: v0; physical register: v0.
Save rule: Caller.
Read it through its psABI role first, then inspect how each instruction reads or writes it.
Physical Name v0ABI Name v0Save Rule Caller
Role
Vector mask/data register
Convention
Caller-saved
Remember This First
The calling convention listed for this entry is: Caller-saved.
psABI Vector Register Reference
ABI register
v0 is an RVV vector register; element count and layout are controlled by vl, vtype, VLEN, and LMUL. v0 also serves as the mask register for masked vector operations (v0.t).
Preserved across calls: Caller
RISC-V psABI vector register conventionWhen It Fits Best
- - Use it according to the documented role: Vector mask/data register.
- - Consult the applicable ISA or ABI specification for concrete read, write, or execution semantics.
When Not To Use It This Way
- - Do not apply the integer temporary-register t* rules to this entry.
- - Do not infer behavior not defined by this page or the applicable specification from the ABI name.
What Happens Around A Call
1
The calling convention listed for this entry is: Caller-saved.
2
The save rule listed for this entry is: Caller.
Read The Documented Role
Examples explain the rule, not a complete program# v0 / v0
# Vector mask/data register
# Caller-saved