RVOPcodeRISC-V Developer Reference

RISC-V Topic Guide

Calling Convention

The standard RISC-V psABI calling convention covers caller/callee-saved integer registers, a0-a7 argument registers with a0-a1 also used for returns, the optional s0/fp frame-pointer chain, 16-byte stack alignment at entry and throughout execution, and hardware floating-point ABI argument and return rules. ILP32E is an exception: it uses a0-a5 and requires only 4-byte stack alignment.

a0-a7raspgptpt0-t6s0-s11fp/s0fa0-fa7caller-savedcallee-saved16-byte stack alignmentreturn valuesargument passing

Core Concepts

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

16-byte stack alignment

Find related instructions, registers, CSRs, or pseudo-instructions.

Find related instructions, registers, CSRs, or pseudo-instructions.

argument passing

Find related instructions, registers, CSRs, or pseudo-instructions.

Related Entries

function-call stack-frame control-flow floating-point system-call vector-programming

Official References

RISC-V behavior on this topic should be checked against the official specifications; content additions should only use facts verifiable in these documents.

RISC-V Unprivileged ISA Manual RISC-V Privileged Architecture Manual RISC-V Assembly Programmer's Manual RISC-V psABI Specification