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RISC-V Topic Guide

Cryptography Extensions

RISC-V cryptography covers the scalar Zk* and vector Zv* extension families for AES, SHA-2, SM3/SM4, GCM/GMAC, and related bit operations; Zkt and several vector crypto instructions also define requirements related to data-independent execution latency.

AES64ESAES64KS1ISHA256SUM0SM3P0SM4EDCLMULVAESDM.VVVSHA2MS.VVZkZktZvknedZvksed

Core Concepts

AES64ES

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AES64KS1I

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SHA256SUM0

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SM3P0

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SM4ED

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CLMUL

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VAESDM.VV

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VSHA2MS.VV

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Zk

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Zkt

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Zvkned

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Zvksed

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Related Entries

bit-manipulationvector-programmingmemory-ordering

Official References

RISC-V behavior on this topic should be checked against the official specifications; content additions should only use facts verifiable in these documents.

RISC-V Unprivileged ISA ManualRISC-V Privileged Architecture ManualRISC-V Assembly Programmer's ManualRISC-V psABI Specification