CSR Bit Fields

RISC-V srmcfg CSR Register

Address 0x181Privilege SupervisorAccess RW / SXLENSupervisor address-translation and memory-protection CSRs

srmcfg (0x181) is the Ssqosid Supervisor Resource Management Configuration CSR, using WARL RCID and MCID fields to configure resource-control and monitoring identifiers.

Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
Field Map

Understand srmcfg By Bit Fields

1 key fields
SXLEN-1:0

RCID_MCID

WARL

Contains WARL Resource Control ID (RCID) and Monitoring Counter ID (MCID) fields; interpret exact field widths from the Ssqosid figures and implementation support.

RCID_MCID (bits SXLEN-1:0) — Contains WARL Resource Control ID (RCID) and Monitoring Counter ID (MCID) fields; interpret exact field widths from the Ssqosid figures and implementation support.

What This Field Controls

  • - Contains WARL Resource Control ID (RCID) and Monitoring Counter ID (MCID) fields; interpret exact field widths from the Ssqosid figures and implementation support.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

Open Official Manual
Official Basis & Search Notes

srmcfg configures RCID and MCID for shared-resource requests from the hart. RCID controls resource allocation; MCID identifies monitoring.

Ssqosid defines srmcfg as an SXLEN-bit read/write register.
RCID and MCID are WARL fields; exact usable widths are implementation/platform dependent.
By default, RCID/MCID in srmcfg apply to software execution at all privilege levels on that hart.

What To Check First When Reading This CSR

  • - First confirm that the hart implements the extension containing srmcfg; unimplemented or insufficiently privileged CSR accesses raise an illegal-instruction exception.
  • - Use address 0x181, the lowest access privilege, and the official access class to decide whether software may access it directly.
  • - Do not assume fixed values for reserved, WPRI, WARL, or WLRL fields; interpret them according to the specification and implementation.

Risk Checks Before Writing

  • - RCID and MCID are WARL; read back after writing to confirm the legal value accepted by the implementation.
  • - If Smstateen and Ssqosid are both implemented, mstateen0.SRMCFG=0 blocks srmcfg access below M-mode.
  • - When V=1, srmcfg access raises a virtual-instruction exception unless relevant state-enable restrictions take precedence.

Put It Back Into A Real Flow

1

Choose RCID and MCID according to the platform resource-control and monitoring policy.

2

After writing srmcfg, read it back to confirm the legal RCID/MCID values accepted by the WARL fields.

3

In virtualization or state-enable scenarios, first confirm controls such as mstateen0.SRMCFG allow the current context to use this CSR.

FAQ

Is srmcfg a page-table or PMP CSR?

No. It is an Ssqosid resource-management/QoS identifier CSR, not an address-translation or PMP region control CSR.