Can sscratchcswl be used as a standard CSR?
No. It is not listed in the current official RISC-V Privileged/AIA CSR tables; treat it only as implementation-defined or historical-draft content.
CSR Bit Fields
RISC-V sscratchcswl CSR Register
Address 0x149Privilege Implementation-defined / not current standardAccess Implementation-defined / Implementation-definedReserved, custom, or uncategorized CSRs
sscratchcswl at 0x149 is retained as a compatibility/draft-origin CSR; the current official RISC-V Privileged and AIA CSR tables do not list it.
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
Field Map
Understand sscratchcswl By Bit Fields
0 key fields
Official Basis & Search Notes
sscratchcswl is not a standard Supervisor CSR in the current official RISC-V Privileged/AIA CSR tables; this page keeps it to prevent historical data from being mistaken for ratified specification.
The official privileged snapshot does not contain sscratchcswl.
No bit fields, read/write side effects, or interrupt behavior are declared.
Implementation documentation is required before using a same-named CSR.
What To Check First When Reading This CSR
- - The current official RISC-V Privileged and AIA CSR tables do not list sscratchcswl; consult the target implementation manual before access.
- - Do not treat old CLIC-draft or toolchain-retained names as ratified standard behavior.
Risk Checks Before Writing
- - No official standard fields are declared for sscratchcswl on this page; write semantics must come from implementation documentation.
Put It Back Into A Real Flow
1
Recognize sscratchcswl when porting old code or reading implementation documentation.
2
Return to the target chip or simulator manual for address, access, width, and side effects.
3
If implementation documentation is absent, do not depend on it in portable software.