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AMOMAX.D

RISC-V AMOMAX.D Instruction Details

Instruction ManualR-type

RV64 atomic signed-maximum 64-bit doubleword: rd returns the old memory value, while memory receives signed max(old, rs2)

Instruction Syntax

amomax.d rd, rs2, (rs1)
Operand Breakdown
rd: receives the old memory value read atomically; for AMOCAS, its pre-execution value also supplies the compare value.
rs1: directly supplies the atomic-memory address; AMO assembly syntax has no offset immediate field.
rs2: supplies the AMO source data; for AMOCAS, it is the swap value stored when the comparison matches.
AMO-type is this site's presentation label for the AMO-specific R-type field layout: funct5, aq, rl, rs2, rs1, funct3, rd, and the AMO opcode encode the operation.
AZaamoAtomic Operation

Instruction Behavior

AMOMAX.D performs an atomic read-modify-write on the 64-bit doubleword addressed by rs1: it first reads the old memory doubleword into rd, then computes signed max(oldDoubleword, rs2Doubleword) using signed maximum semantics and writes the 64-bit result back to the same address. The operation uses a signed 64-bit comparison; it is not a per-bit logical operation. aq/rl bits affect memory ordering only; they do not change the data result.

AMOMAX.D Atomic Decode And Execute Animation

Shows A / Zaamo doubleword atomic field decode, aq/rl ordering bits, a memory read, and RMW state update.

rd
rs2
rs1
amomax.d
,
,(
)
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
10100
funct5
0
aq
0
rl
01011
rs2
01010
rs1
011
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0xA0B532AF
opcode
0101111 -> AMO
funct3
011 -> doubleword width
funct5
10100 -> AMOMAX.D
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)=0x0000000000000001 / a0(x10)=0x0000000000001000
memory read
mem[0x0000000000001000] -> old doubleword 0x8000000000000000
RMW
(-9223372036854775808 >= 1) = false -> 0x0000000000000001
rd / memory
t0(x5) = 0x8000000000000000; mem[0x0000000000001000] = 0x0000000000000001
Current Step

Concept Step: receive the 32-bit atomic instruction encoding

A / Zaamo-extension doubleword atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.

encoding: 0xA0B532AF
syntax : amomax.d t0(x5), a1(x11), (a0(x10))
result : t0(x5) = 0x8000000000000000; mem[0x0000000000001000] = 0x0000000000000001
Signed 64-bit Doubleword Comparison
old doubleword
0x8000000000000000 (-9223372036854775808)
rs2 doubleword
0x0000000000000001 (1)
comparison
(old >= rs2) = false -> rs2 value
memory result
0x0000000000000001

AMOMAX.D selects the memory writeback doubleword using a signed 64-bit comparison; this is not a per-bit logical operation.

This animation shows ISA-visible atomic read-modify-write, compare-and-swap, LR/SC reservation state, and ordering bits, not any specific CPU cache-coherence implementation, pipeline, or timing.

Quick Understanding & Search Notes

AMOMAX.D is an RV64 64-bit AMO.D read-modify-write instruction. On a successful access with rd other than x0, rd returns the old doubleword before the operation; only the result of signed max(oldDoubleword, rs2Doubleword) is written back to memory, so keep old-value return separate from memory update.

funct5=10100, funct3=011, and opcode=0101111 identify AMOMAX.D; aq/rl bits do not change the data calculation.
rd receives the old 64-bit memory doubleword before the operation; memory receives the 64-bit result computed by this AMO.D instruction.
AMOMAX.D is an RV64-only doubleword AMO and normally requires 8-byte natural alignment; alignment is relaxed only when a misaligned atomicity granule PMA is present and all accessed bytes are within one granule.
AMOMAX.D uses a signed 64-bit comparison to select the writeback value; do not explain min/max with a per-bit logical view.
These read-modify-write effects assume a successful access. With rd=x0, the old-value register write is discarded but memory is still updated. rs2 uses its pre-execution value even when it overlaps rd. The target memory region must support this AMO width and operation.

Common Usage Scenarios

Atomic & Sync

Successful 64-bit access example: a2=0x1000, old memory=5, a1=3; amomax.d a0, a1, (a2) returns a0=5 and updates memory to 5. The address is naturally aligned and the region supports this AMO.

Signed Comparisons

Successful 64-bit access example: a2=0x1000, old memory=5, a1=3; amomax.d a0, a1, (a2) returns a0=5 and updates memory to 5. The address is naturally aligned and the region supports this AMO.

RV64 Operations

Successful 64-bit access example: a2=0x1000, old memory=5, a1=3; amomax.d a0, a1, (a2) returns a0=5 and updates memory to 5. The address is naturally aligned and the region supports this AMO.

Pre-Use Checklist

Syntax Check
  • rd, rs2, and rs1 select x0–x31 or their ABI names; syntax is rd, rs2, (rs1), with no rs3 or offset immediate.
  • Check funct5 for the operation and funct3 for access width; aq/rl are separate ordering bits, not a fixed funct7 constant.
Semantic Check
  • Check natural alignment or the misaligned atomicity granule PMA condition; the target region must support this AMO width and operation.
  • On success, rd receives old memory and the computed result goes to memory; rd=x0 discards only register writeback. On RV64, AMO.W sign-extends the old word and uses only rs2[31:0].

Pitfalls / Common Confusions

rd holds the old 64-bit memory value before the operation, not the new signed maximum memory result.
AMOMAX.D is an RV64-only doubleword AMO and normally requires 8-byte natural alignment; alignment is relaxed only when a misaligned atomicity granule PMA is present and all accessed bytes are within one granule.
Memory receives the 64-bit result of signed max(oldDoubleword, rs2Doubleword); signed 64-bit comparison can choose a different value than the other comparison class.
aq/rl constrain memory ordering only; they do not change this AMO.D instruction's data result.

FAQ

Does AMOMAX.D place the new memory result in rd?

No. AMOMAX.D places the old 64-bit memory value before the operation in rd; the result of signed max(oldDoubleword, rs2Doubleword) is written back to memory.

Do aq/rl bits change the signed maximum result of AMOMAX.D?

No. aq/rl only affect memory-ordering constraints; they do not change this AMO.D instruction's 64-bit data result.