Does AMOMIN.D place the new memory result in rd?
No. AMOMIN.D places the old 64-bit memory value before the operation in rd; the result of signed min(oldDoubleword, rs2Doubleword) is written back to memory.
AMOMIN.D
RISC-V AMOMIN.D Instruction Details
Instruction ManualR-typeRV64 atomic signed-minimum 64-bit doubleword: rd returns the old memory value, while memory receives signed min(old, rs2)
Instruction Syntax
amomin.d rd, rs2, (rs1)
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
AZaamoAtomic Operation
Instruction Behavior
AMOMIN.D performs an atomic read-modify-write on the 64-bit doubleword addressed by rs1: it first reads the old memory doubleword into rd, then computes signed min(oldDoubleword, rs2Doubleword) using signed minimum semantics and writes the 64-bit result back to the same address. The operation uses a signed 64-bit comparison; it is not a per-bit logical operation. aq/rl bits affect memory ordering only; they do not change the data result.
AMOMIN.D Atomic Decode And Execute Animation
Shows A-extension doubleword atomic field decode, aq/rl ordering bits, memory read, and RMW state update.
rd
rs2
rs1
amomin.d,,()
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
10000
funct5
0
aq
0
rl
01011
rs2
01010
rs1
011
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0x80B532AF
opcode
0101111 -> AMO
funct3
011 -> doubleword width
funct5
10000 -> AMOMIN.D
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)=0x0000000000000001 / a0(x10)=0x00001000
memory read
mem[0x00001000] -> old doubleword 0x8000000000000000
RMW
-9223372036854775808 <= 1 -> 0x8000000000000000
rd / memory
t0(x5) = 0x00000000; mem[0x00001000] = 0x8000000000000000
Current Step
Concept Step: receive the 32-bit atomic instruction encoding
A-extension doubleword atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.
encoding: 0x80B532AF
syntax : amomin.d t0(x5), a1(x11), (a0(x10))
result : t0(x5) = 0x00000000; mem[0x00001000] = 0x8000000000000000
Signed 64-bit Doubleword Comparison
old doubleword
0x8000000000000000 (-9223372036854775808)
rs2 doubleword
0x0000000000000001 (1)
comparison
old <= rs2 -> old value
memory result
0x8000000000000000
AMOMIN.D selects the memory writeback doubleword using a signed 64-bit comparison; this is not a per-bit logical operation.
This animation shows ISA-visible atomic read-modify-write, compare-and-swap, LR/SC reservation state, and ordering bits, not any specific CPU cache-coherence implementation, pipeline, or timing.
Quick Understanding & Search Notes
AMOMIN.D is an RV64 64-bit AMO.D read-modify-write instruction. rd always returns the old doubleword before the operation; only the result of signed min(oldDoubleword, rs2Doubleword) is written back to memory, so keep old-value return separate from memory update.
funct5=10000, funct3=011, and opcode=0101111 identify AMOMIN.D; aq/rl bits do not change the data calculation.
rd receives the old 64-bit memory doubleword before the operation; memory receives the 64-bit result computed by this AMO.D instruction.
AMOMIN.D is an RV64-only doubleword AMO, and the address must be naturally aligned to 8 bytes.
AMOMIN.D uses a signed 64-bit comparison to select the writeback value; do not explain min/max with a per-bit logical view.
Common Usage Scenarios
Atomic & Sync
Understand this scenario with real code like «amomin.d a0, a1, (a2) # a0 = *a2; *a2 = min(*a2, a1) (64-bit signed)».
Signed Comparisons
Use slt t0, a0, a1 for boolean result; pair with bnez/beq for conditional branches.
RV64 Operations
Understand this scenario with real code like «amomin.d a0, a1, (a2) # a0 = *a2; *a2 = min(*a2, a1) (64-bit signed)».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
rd holds the old 64-bit memory value before the operation, not the new signed minimum memory result.
AMOMIN.D is an RV64-only doubleword AMO, and the address must be naturally aligned to 8 bytes.
Memory receives the 64-bit result of signed min(oldDoubleword, rs2Doubleword); signed 64-bit comparison can choose a different value than the other comparison class.
aq/rl constrain memory ordering only; they do not change this AMO.D instruction's data result.
FAQ
Do aq/rl bits change the signed minimum result of AMOMIN.D?
No. aq/rl only affect memory-ordering constraints; they do not change this AMO.D instruction's 64-bit data result.