Does AMOMINU.D place the new memory result in rd?
No. AMOMINU.D places the old 64-bit memory value before the operation in rd; the result of unsigned min(oldDoubleword, rs2Doubleword) is written back to memory.
AMOMINU.D
RISC-V AMOMINU.D Instruction Details
Instruction ManualR-typeRV64 atomic unsigned-minimum 64-bit doubleword: rd returns the old memory value, while memory receives unsigned min(old, rs2)
Instruction Syntax
amominu.d rd, rs2, (rs1)
Operand Breakdown
rd: receives the old memory value read atomically; for AMOCAS, its pre-execution value also supplies the compare value.
rs1: directly supplies the atomic-memory address; AMO assembly syntax has no offset immediate field.
rs2: supplies the AMO source data; for AMOCAS, it is the swap value stored when the comparison matches.
AMO-type is this site's presentation label for the AMO-specific R-type field layout: funct5, aq, rl, rs2, rs1, funct3, rd, and the AMO opcode encode the operation.
AZaamoAtomic Operation
Instruction Behavior
The following semantics assume the target region supports this AMO width and operation and the access succeeds. AMOMINU.D performs an atomic read-modify-write on the 64-bit doubleword addressed by rs1: it first reads the old memory doubleword into rd, then computes unsigned min(oldDoubleword, rs2Doubleword) using unsigned minimum semantics and writes the 64-bit result back to the same address. The operation uses an unsigned 64-bit comparison; it is not a per-bit logical operation. aq/rl add ordering only in the accessed memory or I/O address domain and do not change the data result; ordering across both domains still needs FENCE. rs2 uses its pre-execution value; rd=x0 discards only the old-value register writeback, while the memory operation still occurs.
AMOMINU.D Atomic Decode And Execute Animation
Shows A / Zaamo doubleword atomic field decode, aq/rl ordering bits, a memory read, and RMW state update.
rd
rs2
rs1
amominu.d,,()
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
11000
funct5
0
aq
0
rl
01011
rs2
01010
rs1
011
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0xC0B532AF
opcode
0101111 -> AMO
funct3
011 -> doubleword width
funct5
11000 -> AMOMINU.D
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)=0x0000000000000001 / a0(x10)=0x0000000000001000
memory read
mem[0x0000000000001000] -> old doubleword 0xFFFFFFFFFFFFFFFF
RMW
(18446744073709551615 <= 1) = false -> 0x0000000000000001
rd / memory
t0(x5) = 0xFFFFFFFFFFFFFFFF; mem[0x0000000000001000] = 0x0000000000000001
Current Step
Concept Step: receive the 32-bit atomic instruction encoding
A / Zaamo-extension doubleword atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.
encoding: 0xC0B532AF
syntax : amominu.d t0(x5), a1(x11), (a0(x10))
result : t0(x5) = 0xFFFFFFFFFFFFFFFF; mem[0x0000000000001000] = 0x0000000000000001
Unsigned 64-bit Doubleword Comparison
old doubleword
0xFFFFFFFFFFFFFFFF (18446744073709551615)
rs2 doubleword
0x0000000000000001 (1)
comparison
(old <= rs2) = false -> rs2 value
memory result
0x0000000000000001
AMOMINU.D selects the memory writeback doubleword using an unsigned 64-bit comparison; this is not a per-bit logical operation.
Assumes the region supports this AMO and the access succeeds. Shows comparison, old-value return, memory update and aq/rl ordering in the accessed domain. Steps are a teaching sequence; access faults, CPU cache coherence, pipelines and timing are not modeled.
Quick Understanding & Search Notes
AMOMINU.D is an RV64 64-bit AMO.D read-modify-write instruction. On successful access with rd≠x0, rd returns the old doubleword before the operation; only the result of unsigned min(oldDoubleword, rs2Doubleword) is written back to memory, so keep old-value return separate from memory update.
funct5=11000, funct3=011, and opcode=0101111 identify AMOMINU.D; aq/rl bits do not change the data calculation.
rd receives the old 64-bit memory doubleword before the operation; memory receives the 64-bit result computed by this AMO.D instruction.
AMOMINU.D is an RV64-only doubleword AMO and normally requires an 8-byte naturally aligned address. A misaligned atomicity granule PMA avoids an address-alignment exception when all accessed bytes lie in one granule.
AMOMINU.D uses an unsigned 64-bit comparison to select the writeback value; do not explain min/max with a per-bit logical view.
Common Usage Scenarios
Atomic & Sync
Successful 64-bit access example: a2=0x1000, old memory=5, a1=3; amominu.d a0, a1, (a2) returns a0=5 and updates memory to 3. The address is naturally aligned and the region supports this AMO.
Unsigned Comparisons
Successful 64-bit access example: a2=0x1000, old memory=5, a1=3; amominu.d a0, a1, (a2) returns a0=5 and updates memory to 3. The address is naturally aligned and the region supports this AMO.
RV64 Operations
Successful 64-bit access example: a2=0x1000, old memory=5, a1=3; amominu.d a0, a1, (a2) returns a0=5 and updates memory to 3. The address is naturally aligned and the region supports this AMO.
Pre-Use Checklist
Syntax Check
- rd, rs2, and rs1 select x0–x31 or their ABI names; syntax is rd, rs2, (rs1), with no rs3 or offset immediate.
- Check funct5 for the operation and funct3 for access width; aq/rl are separate ordering bits, not a fixed funct7 constant.
Semantic Check
- Check natural alignment or the misaligned atomicity granule PMA condition; the target region must support this AMO width and operation.
- On success, rd receives old memory and the computed result goes to memory; rd=x0 discards only register writeback. On RV64, AMO.W sign-extends the old word and uses only rs2[31:0].
Pitfalls / Common Confusions
rd holds the old 64-bit memory value before the operation, not the new unsigned minimum memory result.
AMOMINU.D is an RV64-only doubleword AMO and normally requires an 8-byte naturally aligned address. A misaligned atomicity granule PMA avoids an address-alignment exception when all accessed bytes lie in one granule.
Memory receives the 64-bit result of unsigned min(oldDoubleword, rs2Doubleword); unsigned 64-bit comparison can choose a different value than signed comparison.
aq/rl constrain memory ordering only; they do not change this AMO.D instruction's data result.
FAQ
Do aq/rl bits change the unsigned minimum result of AMOMINU.D?
No. aq/rl only affect memory-ordering constraints; they do not change this AMO.D instruction's 64-bit data result.