Does AMOMINU.W place the new memory result in rd?
No. AMOMINU.W places the old memory word before the operation in rd; the result of unsigned min(oldWord, rs2LowWord) is written back to memory.
AMOMINU.W
RISC-V AMOMINU.W Instruction Details
Instruction ManualR-typeAtomic 32-bit word unsigned minimum: rd returns the old memory word, while memory receives the 32-bit result of unsigned min(oldWord, rs2LowWord)
Instruction Syntax
amominu.w rd, rs2, (rs1)
Operand Breakdown
rd: receives the old memory value read atomically; for AMOCAS, its pre-execution value also supplies the compare value.
rs1: directly supplies the atomic-memory address; AMO assembly syntax has no offset immediate field.
rs2: supplies the AMO source data; for AMOCAS, it is the swap value stored when the comparison matches.
AMO-type is this site's presentation label for the AMO-specific R-type field layout: funct5, aq, rl, rs2, rs1, funct3, rd, and the AMO opcode encode the operation.
AZaamoAtomic
Instruction Behavior
The following semantics assume the target region supports this AMO width and operation and the access succeeds. AMOMINU.W performs an atomic read-modify-write on the 32-bit word addressed by rs1: it first reads the old memory word and sign-extends it into rd, then compares the old word and the low 32 bits of rs2 as unsigned 32-bit values and writes back the smaller word. The resulting 32-bit word is written back to the same address. aq/rl add ordering only in the accessed memory or I/O address domain and do not change the unsigned-minimum data result; ordering across both domains still needs FENCE. rs2 uses its pre-execution value; rd=x0 discards only the old-value register writeback, while the memory operation still occurs.
AMOMINU.W Atomic Decode And Execute Animation
Shows A / Zaamo word atomic field decode, aq/rl ordering bits, a memory read, and RMW state update.
rd
rs2
rs1
amominu.w,,()
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
11000
funct5
0
aq
0
rl
01011
rs2
01010
rs1
010
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0xC0B522AF
opcode
0101111 -> AMO
funct3
010 -> word width
funct5
11000 -> AMOMINU.W
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)[31:0]=0x00000001 / a0(x10)=0x00001000
memory read
mem[0x00001000] -> old word 0xFFFFFFFF
RMW
(4294967295 <= 1) = false -> 0x00000001
rd / memory
t0(x5) = 0xFFFFFFFF; mem[0x00001000] = 0x00000001
Current Step
Concept Step: receive the 32-bit atomic instruction encoding
A / Zaamo-extension word atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.
encoding: 0xC0B522AF
syntax : amominu.w t0(x5), a1(x11), (a0(x10))
result : t0(x5) = 0xFFFFFFFF; mem[0x00001000] = 0x00000001
Unsigned 32-bit Word Comparison
old word
0xFFFFFFFF (4294967295)
rs2 word
0x00000001 (1)
comparison
(old <= rs2) = false -> rs2 value
memory result
0x00000001
AMOMINU.W selects the memory writeback word using an unsigned 32-bit comparison; this is not a per-bit logical operation.
Assumes the region supports this AMO and the access succeeds. Shows comparison, old-value return, memory update and aq/rl ordering in the accessed domain. Steps are a teaching sequence; access faults, CPU cache coherence, pipelines and timing are not modeled.
Quick Understanding & Search Notes
AMOMINU.W is used for atomic unsigned minimum updates. The value returned in rd on successful access with rd≠x0 is the old memory word; the new 32-bit word after the unsigned minimum operation is written only to memory.
funct5=11000, funct3=010, and opcode=0101111 identify AMOMINU.W; aq/rl bits do not change the data calculation.
rd receives the old memory word before the operation; memory receives the 32-bit result of unsigned min(oldWord, rs2LowWord).
AMO.W is a word-width AMO and normally requires a 4-byte naturally aligned address. On RV64, the old word in rd is sign-extended to XLEN; a misaligned atomicity granule PMA avoids an address-alignment exception when all accessed bytes lie in one granule.
AMOMINU.W is a word comparison operation; comparison uses unsigned 32-bit values, not a per-bit logical operation.
Common Usage Scenarios
Atomic & Sync
Successful 32-bit access example: a2=0x1000, old memory=5, a1=3; amominu.w a0, a1, (a2) returns a0=5 and updates memory to 3. The address is naturally aligned and the region supports this AMO.
Unsigned Bounds
Successful 32-bit access example: a2=0x1000, old memory=5, a1=3; amominu.w a0, a1, (a2) returns a0=5 and updates memory to 3. The address is naturally aligned and the region supports this AMO.
Pre-Use Checklist
Syntax Check
- rd, rs2, and rs1 select x0–x31 or their ABI names; syntax is rd, rs2, (rs1), with no rs3 or offset immediate.
- Check funct5 for the operation and funct3 for access width; aq/rl are separate ordering bits, not a fixed funct7 constant.
Semantic Check
- Check natural alignment or the misaligned atomicity granule PMA condition; the target region must support this AMO width and operation.
- On success, rd receives old memory and the computed result goes to memory; rd=x0 discards only register writeback. On RV64, AMO.W sign-extends the old word and uses only rs2[31:0].
Pitfalls / Common Confusions
rd holds the old memory word before the operation, not the new unsigned minimum memory result.
AMO.W atomically accesses a 32-bit word; on RV64, the old word loaded into rd is sign-extended to XLEN.
Only the low 32-bit word of rs2 participates in the calculation, and memory receives a 32-bit word result.
aq/rl constrain memory ordering only; they do not change the value of unsigned min(oldWord, rs2LowWord).
FAQ
Do aq/rl bits change the unsigned minimum result of AMOMINU.W?
No. aq/rl only affect memory-ordering constraints; they do not change this AMO.W instruction's 32-bit data result.