C.MOP.5

RISC-V C.MOP.5 Instruction Details

Instruction ManualC-type

A nullary 16-bit Zcmop MOP with no base register write; active Zicfiss uses this encoding for C.SSPOPCHK x5.

Instruction Syntax

c.mop.5

The recommended syntax c.mop.5 has no explicit operands; its 16-bit encoding is fixed to 0110001010000001, with no variable register or immediate field.

Zcmop 1.0 depends on Zca; base behavior writes no register, and a redefinition may use implicit x5.

When Zicfiss is implemented and active for the current privilege mode, this encoding is C.SSPOPCHK x5; otherwise base Zcmop behavior applies.

ZcmopMay-Be-Operations

Instruction Encoding

15..0
0110001010000001

C.MOP.5 has fixed 16-bit encoding 0110001010000001; its assembly syntax has no explicit operands.

Format: Zcmop fixed 16-bit encoding
16-bit encoding: 0110001010000001
Compressed instruction, 16-bit encoding.

Instruction Behavior

C.MOP.5 is a compressed may-be-operation in Zcmop 1.0, which depends on Zca. The recommended syntax c.mop.5 has no explicit operands, and base behavior writes no register. A redefinition may use implicit x5: when Zicfiss is implemented and active for the current privilege mode, this encoding is C.SSPOPCHK x5; otherwise it reverts to base Zcmop behavior.

Quick Understanding & Search Notes

c.mop.5 has no explicit operands. Distinguish base Zcmop behavior, which writes no register, from the C.SSPOPCHK x5 redefinition under active Zicfiss.

Zcmop defines only the eight odd-numbered C.MOP.n instructions from 1 through 15.
C.MOP.5 has fixed 16-bit encoding 0110001010000001; x5 is implicit for a redefinition, not an explicit operand.
The default differs from Zimop MOP.R.n, which writes zero to rd.
When Zicfiss is implemented and active, this encoding is C.SSPOPCHK x5 and expands to SSPOPCHK x5; otherwise Zcmop behavior applies.

Common Usage Scenarios

Zcmop MOP

Understand this scenario with real code like «c.mop.5».

Extension-defined

Understand this scenario with real code like «c.mop.5».

Pre-Use Checklist

Syntax Check
  • The recommended syntax c.mop.5 has no explicit operands; its 16-bit encoding is fixed to 0110001010000001, with no variable register or immediate field.
Semantic Check
  • Zcmop 1.0 depends on Zca; base behavior writes no register, and a redefinition may use implicit x5.
  • When Zicfiss is implemented and active for the current privilege mode, this encoding is C.SSPOPCHK x5; otherwise base Zcmop behavior applies.

Pitfalls / Common Confusions

Base Zcmop C.MOP.n writes no register; this differs from Zimop MOP.R/MOP.RR, which write zero to rd by default.
Do not rely on useful C.MOP behavior in ordinary software unless a target extension explicitly redefines the encoding.
Do not apply base Zcmop behavior to active Zicfiss: that extension uses this encoding for C.SSPOPCHK x5.

FAQ

Does C.MOP.5 write a register by default?

No. The official Zcmop rule says C.MOP.n writes no register by default.

What is the implicit register for C.MOP.5?

x5, which a redefinition may read. Implemented and active Zicfiss uses this encoding for C.SSPOPCHK x5; otherwise base Zcmop behavior applies.