RVOPcode
Home/Instructions/FCVT-H-D
FCVT.H.D

RISC-V FCVT.H.D Instruction Details

Instruction ManualR-type

Convert double-precision float to half-precision float

Instruction Syntax

fcvt.h.d rd, rs1, rm
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
ZfhZfhminDFloating-Point Convert
Related Search Terms
fcvt.h.d instructiondouble-precision to half-precisionfcvt.h.d conversionfcvt.h.d roundingfcvt.h.d floating point

Instruction Behavior

fcvt.h.d converts a double-precision source operand to a narrower half-precision result. If the destination format cannot represent the value exactly, the result is rounded according to rm.

Quick Understanding & Search Notes

fcvt.h.d converts a double-precision source operand to a narrower half-precision result. If the destination format cannot represent the value exactly, the result is rounded according to rm.

The rs2/fmt encoding selects source and destination formats; the mnemonic suffixes carry the main semantic distinction.
This is a floating-point narrowing conversion and may set overflow, underflow, or inexact exception flags.
The floating-point source operand in a wider FLEN register must satisfy NaN-boxing rules.
The floating-point result is NaN-boxed in the FLEN register according to the destination format.
RISC-V Unprivileged ISA Manual, Zfh half-precision floating-point extensionRISC-V Unprivileged ISA Manual, D double-precision floating-point extension

Common Usage Scenarios

Type Conversion

Understand this scenario with real code like «fcvt.h.d f10, f11, rne ; f10 = (half)f11».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

This is a floating-point narrowing conversion and may set overflow, underflow, or inexact exception flags.
The floating-point source operand in a wider FLEN register must satisfy NaN-boxing rules.
The floating-point result is NaN-boxed in the FLEN register according to the destination format.

FAQ

When does rm matter for fcvt.h.d?

When the destination format cannot exactly represent the source value, rm or dynamic frm selects the rounding direction.

How does fcvt.h.d differ from related FCVT instructions?

It differs by source/destination format, integer signedness, RV64 restrictions, and whether rounding or invalid conversion can occur.