What is the main difference from the ordinary form?
The M form returns canonical NaN if either input is NaN; the ordinary form returns the other non-NaN operand when exactly one input is NaN.
FMAXM.D
RISC-V FMAXM.D Instruction Details
Instruction ManualR-typeReturn the maximum of two double-precision floating-point operands.
Instruction Syntax
fmaxm.d rd, rs1, rs2
Operand Breakdown
rd: destination floating-point register receiving the formatted result.
rs1/rs2: source floating-point registers; arithmetic/rounding forms with rm use rm or dynamic frm for rounding mode.
ZfaDFloating-Point Arithmetic
Instruction Behavior
FMAXM.D is the Zfa double-precision IEEE 754-2019 maximum operation: if either input is NaN, the result is canonical NaN; otherwise it returns the numerically larger operand and handles -0.0 versus +0.0 as specified.
FMAXM.D Decode And Execute Animation
Shows the Zfa + D-extension double-precision OP-FP flow: decode fields, read FP operands, perform FMAXM semantics, then write rd.
rd
rs1
rs2
fmaxm.d
,
,
Execution Context
FLEN=>=64 / fmt=D (01)
funct3: FMAXM (either NaN is canonical NaN)
fflags: example fflags remains 0
31..27
26..25
24..20
19..15
14..12
11..7
6..0
00101
FMAXM
01
fmt=D
01100
rs2
01011
rs1
011
funct3=011
01010
rd
1010011
OP-FP
Execution Data Path
instruction
0x2AC5B553
opcode
1010011 -> OP-FP
funct5/fmt
00101 + D(01) -> FMAXM.D
funct3
011 -> FMAXM (either NaN is canonical NaN)
rd/rs
fa0(f10) / fa1(f11) / fa2(f12)
read
-0.0, 0.0
FP op
FMAXM(-0.0, 0.0) = 0.0
write
fa0(f10) = 0.0; example fflags remains 0
Current Step
Fetch: show the 32-bit OP-FP encoding
The word is split as an R-type OP-FP instruction; double-precision OP-FP instructions use opcode 1010011.
encoding: 0x2AC5B553
syntax : fmaxm.d fa0(f10), fa1(f11), fa2(f12)
result : fa0(f10) = 0.0; example fflags remains 0
The default example shows the official signed-zero ordering: -0.0 is less than +0.0. If either input is NaN, Zfa FMINM/FMAXM returns canonical NaN; a signaling NaN sets NV.
Double-precision Calculation
rs1
fa1(f11) = -0.0
rs2
fa2(f12) = 0.0
result
FMAXM(-0.0, 0.0) = 0.0
The default example shows the official signed-zero ordering: -0.0 is less than +0.0. If either input is NaN, Zfa FMINM/FMAXM returns canonical NaN; a signaling NaN sets NV.
This animation shows only Zfa + D-extension ISA-visible OP-FP encoding, example numeric results, and fflags relationship; it does not model FPU pipelines, latency, every IEEE 754 corner case, or microarchitecture.
Quick Understanding & Search Notes
FMAXM.D's key search point is NaN handling. The M form is the Zfa version and returns canonical NaN if either input is NaN.
-0.0 and +0.0 are ordered: -0.0 is less than +0.0.
The instruction does not use rm; it is a selection operation, not rounded arithmetic.
Common Usage Scenarios
Floating-Point Compare
Understand this scenario with real code like «fmaxm.d f10, f11, f12 ; IEEE 754-2019 max (double)».
Numerical Computing
Understand this scenario with real code like «fmaxm.d f10, f11, f12 ; IEEE 754-2019 max (double)».
Pre-Use Checklist
Syntax Check
- rd: destination floating-point register receiving the formatted result.
- rs1/rs2: source floating-point registers; arithmetic/rounding forms with rm use rm or dynamic frm for rounding mode.
Semantic Check
- Confirm the floating-point format suffix (.H/.S/.D/.Q) matches the data width.
- Decide whether software must inspect fflags for NV, DZ, OF, UF, or NX.
Pitfalls / Common Confusions
Unlike ordinary FMIN/FMAX, FMINM/FMAXM returns canonical NaN if either input is NaN.
A signaling NaN sets NV; quiet-NaN handling differs between ordinary and M forms.
-0.0 is considered less than +0.0.
FAQ
Does FMAXM.D round?
No. It selects between two operands and has no rm rounding field.