Home/Instructions/Quad-Precision Round to Integral, Reporting Inexact
FROUNDNX.Q

RISC-V FROUNDNX.Q Instruction Details

Instruction ManualR-type

Round a quad-precision floating-point value to an integral value in the same FP format; set NX only when the input is not NaN and differs from the rounded result.

Instruction Syntax

froundnx.q rd, rs1, rm
Operand Breakdown
rd, rs1: FP registers f0–f31 or ABI names; f0 is writable and rd may overlap rs1.
rs1 is the only source; rs2=00101 is a fixed selector. Optional rm defaults to dyn; 111 uses frm. Static 101/110 and dynamic frm=101–111 have reserved behavior.
ZfaQFP Precision

Instruction Behavior

When the Q extension is implemented, FROUNDNX.Q rounds the quad-precision floating-point value in f[rs1] to an integral value according to rm, but writes the result back to f[rd] in the same quad-precision floating-point format. It sets NX only when the input is not NaN and differs from the rounded result. A signaling NaN sets NV; a quiet NaN produces the canonical NaN under the general FP NaN rule.

FROUNDNX.Q Decode And Execute Animation

Shows the Zfa + Q-extension quad-precision OP-FP flow: decode fields, read FP operands, perform FROUNDNX semantics, then write rd.

rd
rs1
rm
froundnx.q
,
,

Leave rm empty to use the assembly default dyn encoding and fcsr.frm below.

Execution Context
FLEN=128 / fmt=Q (11)
rounding: RNE nearest-even
fflags: initial 0
31..27
26..25
24..20
19..15
14..12
11..7
6..0
01000
FROUNDNX
11
fmt=Q
00101
rs2=5 (roundToIntegralExact)
01011
rs1
000
rm
01010
rd
1010011
OP-FP
Execution Data Path
instruction
0x46558553
opcode
1010011 -> OP-FP
funct5/fmt
01000 + Q(11) -> FROUNDNX.Q
rm
000 -> RNE nearest-even
rd/rs
fa0(f10) / fa1(f11) / rs2=00101 (fixed)
read
Source registers not read yet
FP op
Awaiting Execute
write
Not written yet; initial fflags=0
Current Step

Fetch: show the 32-bit OP-FP encoding

The word is split as an R-type OP-FP instruction; quad-precision OP-FP instructions use opcode 1010011.

encoding: 0x46558553
syntax : froundnx.q fa0(f10), fa1(f11), rne
result : Not written yet; initial fflags=0

This bounded teaching model computes whitelisted finite examples plus zero, infinity, and NaN; FROUNDNX.Q writes the integral value in Q format. Zero and infinity are copied. NX is set when the input differs from the rounded result and is not NaN.

Quad-precision Calculation
rs1
fa1(f11) = 1.5
result
Awaiting Execute

This bounded teaching model computes whitelisted finite examples plus zero, infinity, and NaN; FROUNDNX.Q writes the integral value in Q format. Zero and infinity are copied. NX is set when the input differs from the rounded result and is not NaN.

Assumes Zfa + Q, FS enabled, correctly NaN-boxed inputs, and initial fflags=0. Accepts the listed exact finite whitelist, signed zeros, infinity, qNaN, and sNaN. Rounding uses rm/frm; zero and infinity are copied, and sNaN sets NV. NX is set when a non-NaN input differs from the rounded result. rd may overlap rs1, and f0 accepts writeback. Steps are teaching views.

This animation shows only Zfa + Q-extension ISA-visible OP-FP encoding, example numeric results, and fflags relationship; it does not model FPU pipelines, latency, every IEEE 754 corner case, or microarchitecture.

Quick Understanding & Search Notes

Unlike FP-to-integer FCVT.W.Q, FROUNDNX.Q writes an integral value in the same FP format to an FP register. FCVT.W.Q writes an integer register. FROUNDNX sets NX when a non-NaN input changes.

RV32/RV64 requires Zfa+Q and enabled FP state. 32-bit OP-FP: funct5=01000, fmt=11, rs2=00101, opcode=1010011; rs2 is a fixed selector.
Optional rm defaults to dyn; rm=111 selects frm. Static rm=101/110 and dynamic frm=101–111 have reserved behavior.
The result stays in the same FP format; signed zeros and infinities are copied, NaNs produce canonical NaN, and sNaN sets NV. Changed non-NaN values set NX, with no DZ, OF, or UF added; existing fflags are preserved.
For a source narrower than FLEN, check NaN-boxing: upper bits not all ones make the input a canonical NaN; narrower results get upper ones.

Common Usage Scenarios

Floating-Point Rounding

Assume required extensions and FP state enabled, f11=1.5 in this format (validly NaN-boxed when narrower than FLEN), and initial fflags=0: the rne example writes f10=2.0 in an FP register; the changed value sets NX=1.

Numeric Format Handling

Assume required extensions and FP state enabled, f11=1.5 in this format (validly NaN-boxed when narrower than FLEN), and initial fflags=0: the rne example writes f10=2.0 in an FP register; the changed value sets NX=1.

Pre-Use Checklist

Syntax Check
  • rd, rs1: FP registers f0–f31 or ABI names; f0 is writable and rd may overlap rs1.
  • rs1 is the only source; rs2=00101 is a fixed selector. Optional rm defaults to dyn; 111 uses frm. Static 101/110 and dynamic frm=101–111 have reserved behavior.
Semantic Check
  • Confirm Zfa, the matching precision extension, enabled FP state, and valid NaN-boxing for narrower sources.
  • The result stays in the same FP format. Zero and infinity are copied; NaN results are canonical, and sNaN adds NV. NX is added only when a non-NaN input differs from the rounded result. No DZ, OF or UF is added; existing fflags are preserved.

Pitfalls / Common Confusions

FROUNDNX sets NX only when the input is not NaN and differs from the rounded result; do not confuse it with FROUND, which does not set NX.
The result is still floating-point, not an integer-register result; use a floating-point-to-integer FCVT form for an integer-register result.
rm controls the direction for rounding to an integral value; static rm=101/110 and reserved frm values under DYN have reserved behavior.

FAQ

Does FROUNDNX.Q write an integer register?

No. The result is written to floating-point register f[rd]; the floating-point value is integral.

How does FROUNDNX.Q differ from the other FROUND form?

FROUNDNX sets NX only when the input is not NaN and differs from the rounded result; FROUND does not set NX.