Does SHA256SUM1 use floating-point or vector registers?
No. These scalar crypto extension instructions use integer X registers.
SHA-256 Σ1 function (uppercase): ROTR(rs1,6) ^ ROTR(rs1,11) ^ ROTR(rs1,25)
SHA256SUM1 uses opcode 0010011 (0x13), funct3 001, funct7 0001011. The rs1 field selects the source register, the 12-bit immediate provides the second operand, and rd selects the destination.
sha256sum1 implements SHA-256 compression Σ1 (uppercase): Σ1(x) = ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25). Reads rs1, computes Σ1, writes to rd. Used in SHA-256 compression E-register update.
SHA256SUM1 is a Zknh scalar cryptography instruction for SHA-256 transform. This page is checked against the official scalar crypto extension, avoiding confusion among round functions, key schedule steps, and operand sources.
Understand this scenario with real code like «sha256sum1 a0, a1».
Understand this scenario with real code like «sha256sum1 a0, a1».
No. These scalar crypto extension instructions use integer X registers.
No. It is a low-level step from AES, SHA, SM3, or SM4; software still combines instructions with the algorithm schedule, round constants, or round keys.