Does VNSRL.WI round?
No. It is a narrowing right shift; use VNCLIP/VNCLIPU when fixed-point rounding and saturation are required.
VNSRL.WI
RISC-V VNSRL.WI Instruction Details
Instruction ManualI-typelogical narrowing right shift from 2*SEW source elements to SEW results.
Instruction Syntax
vnsrl.wi vd, vs2, uimm, vm
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
VVector IntegerShift/Narrowing
Instruction Behavior
VNSRL.WI performs a logical right shift on 2*SEW-wide source elements and writes SEW-width destination elements. The shift amount comes from an immediate.
Quick Understanding & Search Notes
VNSRL.WI shrinks wide integer results back to SEW width using a logical right shift.
Source elements are 2*SEW wide and destination elements are SEW wide.
Logical right shift shifts in zeros at the top.
This instruction does not use vxrm rounding and does not set the vxsat saturation flag.
Common Usage Scenarios
Fixed-Point Scaling
Understand this scenario with real code like «vnsrl.wi v8, v12, 4, v0.t».
Precision Reduction
Understand this scenario with real code like «vnsrl.wi v8, v12, 4, v0.t».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Shift 0+rs1=x0=narrowing type conversion (pseudo vncvt.x.x.w)