CSR Bit Fields

RISC-V mireg CSR Register

Address 0x351Privilege MachineAccess MRW / XLENMachine AIA, timer, and indirect interrupt CSRs

Smcsrind machine indirect register alias CSR; accesses are redirected according to the current miselect value.

Field Map

Understand mireg By Bit Fields

1 key fields
XLEN-1:0

MIREG_ALIAS

MRW

Machine indirect CSR alias window; the actual target and fields are defined by the extension selected by the current miselect value.

MIREG_ALIAS (bits XLEN-1:0) — Machine indirect CSR alias window; the actual target and fields are defined by the extension selected by the current miselect value.

What This Field Controls

  • - Machine indirect CSR alias window; the actual target and fields are defined by the extension selected by the current miselect value.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

Official Basis & Search Notes

Smcsrind machine indirect register alias CSR; accesses are redirected according to the current miselect value.

The official Smcsrind table lists mireg at 0x351, with MRW access and XLEN width.
mireg* CSR numbers are not consecutive because 0x354 is miph.
Access through mireg* with an unimplemented select value is not portable behavior.

What To Check First When Reading This CSR

  • - Confirm Smcsrind or the AIA indirect CSR mechanism before accessing mireg.
  • - mireg* access with an unimplemented select value is UNSPECIFIED and must not be used as a portable software assumption.

Risk Checks Before Writing

  • - Write miselect before accessing mireg*; do not confuse CSR numbers with select values.
  • - The effect of writing mireg* depends entirely on the current select value and the allocating extension.

Put It Back Into A Real Flow

1

Confirm Smcsrind/AIA indirect access support.

2

Write or read miselect to select the target.

3

Access the target through the appropriate mireg* window and interpret the result by the extension that allocated the select value.

FAQ

Does mireg directly represent one fixed register?

No. mireg* is an alias window; the actual target is determined by the current miselect value and allocating extension.

What happens for an unimplemented select value?

The official spec defines this M-mode access as UNSPECIFIED and notes implementations are typically expected to raise an illegal-instruction exception.