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CSR Bit Fields

RISC-V mnepc CSR Register

Address 0x741Privilege MachineAccess RW / MXLEN/XLENReserved, custom, or uncategorized CSRs

RNMI exception program counter holding the interrupted PC on RNMI entry.

Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
VALUE63:0RW
Field Map

Understand mnepc By Bit Fields

1 key fields
XLEN-1:0

VALUE

RW

MXLEN-bit RNMI return address; bit 0 is always zero, and bit 1 reads as zero when only IALIGN=32 is supported.

VALUE (bits XLEN-1:0) — MXLEN-bit RNMI return address; bit 0 is always zero, and bit 1 reads as zero when only IALIGN=32 is supported.

What This Field Controls

  • - MXLEN-bit RNMI return address; bit 0 is always zero, and bit 1 reads as zero when only IALIGN=32 is supported.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

What To Check First When Reading This CSR

  • - First confirm that the current hart implements mnepc; unimplemented or insufficiently privileged accesses raise an illegal-instruction exception.
  • - Use address 0x741 and the lowest access privilege (Machine) to decide whether software may read it directly.
  • - Do not assume fixed values for reserved, WARL, or WLRL bits; interpret the value according to the specification and implementation.

Risk Checks Before Writing

  • - Preserve bits that are not being changed so reserved or implementation-defined fields are not written with invalid values.
  • - Prefer CSRRS/CSRRC for local set/clear operations to avoid CSRRW overwriting concurrently updated status bits.

Put It Back Into A Real Flow

1

During initialization or the relevant privileged flow, software reads mnepc to observe the current state.

2

Modify only the target fields while preserving all other bits.

3

Read back the CSR or validate through later trap, interrupt, or context-switch behavior that the setting took effect.