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CSR Bit Fields

RISC-V sstateen2 CSR Register

Address 0x10EPrivilege SupervisorAccess RW / XLENSupervisor environment-configuration and state-enable CSRs

sstateen2 at 0x10E is an Ssstateen Supervisor state-enable CSR providing bit space for future or defined user-level state-access controls under the official stateen rules.

Related Search Terms
sstateen2 CSRsstateen2 0x10ESsstateenSupervisor state enablesstateen2 WARLU/VU state access
Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
RO063:32RO0RESERVED/STATEEN231:0Undefined bits read zero; standard-defined bits are WARL
Field Map

Understand sstateen2 By Bit Fields

2 key fields
XLEN-1:32

RO0

RO0

Supervisor-level `sstateen` currently has no high-half CSR; on RV64 these upper bits read as zero.

RO0 (bits XLEN-1:32) — Supervisor-level `sstateen` currently has no high-half CSR; on RV64 these upper bits read as zero.

What This Field Controls

  • - Supervisor-level `sstateen` currently has no high-half CSR; on RV64 these upper bits read as zero.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

↗Open Official Manual
31:0

RESERVED/STATEEN2

Undefined bits read zero; standard-defined bits are WARL

The low 32 bits of sstateen2 are reserved for state-enable bit allocation. This page does not infer functions from bit positions; officially standard-defined stateen bits are WARL, while reserved bits not yet defined and bits for unimplemented state read as zero.

RESERVED/STATEEN2 (bits 31:0) — The low 32 bits of sstateen2 are reserved for state-enable bit allocation. This page does not infer functions from bit positions; officially standard-defined stateen bits are WARL, while reserved bits not yet defined and bits for unimplemented state read as zero.

What This Field Controls

  • - The low 32 bits of sstateen2 are reserved for state-enable bit allocation. This page does not infer functions from bit positions; officially standard-defined stateen bits are WARL, while reserved bits not yet defined and bits for unimplemented state read as zero.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

↗Open Official Manual
Official Basis & Search Notes

sstateen2 is a supervisor-level state-enable CSR. This page does not infer concrete extension functions from low bit positions; standard-defined bits are WARL, unimplemented state and undefined reserved bits read zero, and the upper 32 bits read zero on RV64.

The official Smstateen/Ssstateen chapter defines `sstateen0-3` as supervisor-level CSRs and currently provides no supervisor-level high-half CSRs.
`sstateen` bits control U/VU-mode access to extension state, not same-level S-mode access.
Each standard-defined bit is WARL; unimplemented state and undefined reserved bits read as zero.
RISC-V Privileged Architecture Manual: CSR ListingRISC-V Privileged Architecture Manual: Smstateen/Ssstateen

What To Check First When Reading This CSR

  • - Supervisor-level `sstateen` CSRs control U/VU-mode access, not access by S-mode itself; the upper 32 bits read as zero on RV64.
  • - Each standard-defined bit is WARL; bits for unimplemented state and undefined reserved bits read as zero.
  • - If the matching `mstateen` bit is zero, the same bit reads as zero in `sstateen`; VS-mode access is also affected by the matching `hstateen` bit.

Risk Checks Before Writing

  • - Do not infer extension functions from undefined bit positions; preserve unchanged bits and read back to confirm WARL-accepted values.
  • - When an OS is first entered, software should ensure writable `sstateen` bits are initialized to zero before enabling user-level access as needed.

Put It Back Into A Real Flow

1

Confirm whether upper-level `mstateen`/`hstateen` permits access to the matching `sstateen` CSR and corresponding state.

2

S-mode sets only the extension-state bits it is prepared to expose to U/VU mode.

3

Execute the controlled state access at user level; denied access is expected to trap as specified.

FAQ

Can sstateen2 be accessed from any privilege level?

Do not decide from the CSR name alone. The official CSR address encoding and tables define the lowest access privilege; this entry records sstateen2 as Supervisor. Access with insufficient privilege or to an unimplemented CSR raises an illegal-instruction exception.

What is easiest to miss when writing sstateen2?

Do not overwrite the whole CSR as if it were an ordinary integer. Modify only target fields, preserve unchanged bits, and follow the specification for WARL, WLRL, WPRI, or reserved fields.