AMOADD.B

RISC-V AMOADD.B Instruction Details

Instruction ManualR-type

Atomic byte add: rd = *rs1 (sign-ext), *rs1 += rs2[7:0]

Instruction Syntax

amoadd.b rd, rs2, (rs1)
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
ZabhaAtomic

Instruction Behavior

AMOADD.B (Zabha extension) atomically loads a byte from the address in rs1 into rd (sign-extended), adds the low byte of rs2 (overflow wraps), and stores the result back. Supports aq/rl bits.

AMOADD.B Atomic Decode And Execute Animation

Shows Zabha byte atomic field decode, aq/rl ordering bits, memory read, and RMW state update.

rd
rs2
rs1
amoadd.b
,
,(
)
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
00000
funct5
0
aq
0
rl
01011
rs2
01010
rs1
000
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0x00B502AF
opcode
0101111 -> AMO
funct3
000 -> byte width
funct5
00000 -> AMOADD.B
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)=0x20 / a0(x10)=0x00001000
memory read
mem[0x00001000] -> old byte 0xF2
RMW
0xF2 + 0x20 -> 0x12
rd / memory
t0(x5) = 0xFFFFFFF2; mem[0x00001000] = 0x12
Current Step

Concept Step: receive the 32-bit atomic instruction encoding

Zabha-extension byte atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.

encoding: 0x00B502AF
syntax : amoadd.b t0(x5), a1(x11), (a0(x10))
result : t0(x5) = 0xFFFFFFF2; mem[0x00001000] = 0x12
8-bit Byte Addition
old byte
0xF2
rs2 byte
0x20
low 8-bit sum
0xF2 + 0x20
memory result
0x12

AMOADD.B uses full 8-bit byte addition and writes the low 8-bit result to memory; this view avoids per-bit equations that would hide the carry chain.

This animation shows ISA-visible atomic read-modify-write, compare-and-swap, LR/SC reservation state, and ordering bits, not any specific CPU cache-coherence implementation, pipeline, or timing.

Quick Understanding & Search Notes

AMOADD.B is a Zabha 8-bit atomic add instruction. It atomically reads the old memory value, performs the read-modify-write at 8-bit width, and writes the sign-extended old value to rd.

Only the 8-bit subword is operated on; upper bits of rs2 are ignored.
rd receives the old memory value sign-extended to XLEN, not the newly updated value.
The address must be naturally aligned to the operand size; aq/rl bits can provide release-consistency ordering semantics.

Common Usage Scenarios

Atomic & Sync

Understand this scenario with real code like «amoadd.b a0, a2, (a1)».

Network & Byte Order

Understand this scenario with real code like «amoadd.b a0, a2, (a1)».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

rd returns old memory value (sign-extended to XLEN), not the operation result
Addition overflow wraps (modulo 256); byte overflow does not affect higher bytes
Atomicity depends on natural alignment and implementation support

FAQ

Does AMOADD.B return the post-operation value?

No. Like A-extension AMOs, rd receives the old value loaded from memory.

Can AMOADD.B affect neighboring bytes?

Architecturally it modifies only the byte operand; Zabha provides native byte-granule atomic read-modify-write operations.