Does AMOADD.D place the added result in rd?
No. AMOADD.D places the old 64-bit memory value before the add in rd; the low 64-bit added result is written back to memory.
AMOADD.D
RISC-V AMOADD.D Instruction Details
Instruction ManualR-typeRV64 atomic 64-bit doubleword add: rd returns the old memory value, while memory receives the low 64-bit result of old value plus rs2
Instruction Syntax
amoadd.d rd, rs2, (rs1)
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
AZaamoAtomic
Instruction Behavior
AMOADD.D performs an atomic read-modify-write on the 64-bit doubleword addressed by rs1: it reads the old memory value into rd, adds that old value to the 64-bit value from rs2, and writes the low 64-bit result back to the same address. The addition wraps as a 64-bit doubleword; aq/rl bits affect memory ordering and do not change the arithmetic result.
AMOADD.D Atomic Decode And Execute Animation
Shows A-extension doubleword atomic field decode, aq/rl ordering bits, memory read, and RMW state update.
rd
rs2
rs1
amoadd.d,,()
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
00000
funct5
0
aq
0
rl
01011
rs2
01010
rs1
011
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0x00B532AF
opcode
0101111 -> AMO
funct3
011 -> doubleword width
funct5
00000 -> AMOADD.D
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)=0x0000000000000020 / a0(x10)=0x00001000
memory read
mem[0x00001000] -> old doubleword 0xFFFFFFFFFFFFFFF0
RMW
0xFFFFFFFFFFFFFFF0 + 0x0000000000000020 -> 0x0000000000000010
rd / memory
t0(x5) = 0xFFFFFFF0; mem[0x00001000] = 0x0000000000000010
Current Step
Concept Step: receive the 32-bit atomic instruction encoding
A-extension doubleword atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.
encoding: 0x00B532AF
syntax : amoadd.d t0(x5), a1(x11), (a0(x10))
result : t0(x5) = 0xFFFFFFF0; mem[0x00001000] = 0x0000000000000010
64-bit Doubleword Addition
old doubleword
0xFFFFFFFFFFFFFFF0
rs2 doubleword
0x0000000000000020
low 64-bit sum
0xFFFFFFFFFFFFFFF0 + 0x0000000000000020
memory result
0x0000000000000010
AMOADD.D uses full 64-bit doubleword addition and writes the low 64-bit result to memory; this view avoids per-bit equations that would hide the carry chain.
This animation shows ISA-visible atomic read-modify-write, compare-and-swap, LR/SC reservation state, and ordering bits, not any specific CPU cache-coherence implementation, pipeline, or timing.
Quick Understanding & Search Notes
AMOADD.D is commonly used for RV64 64-bit atomic counter updates. rd returns the old doubleword before the add, while memory receives the low 64-bit result of old value plus rs2; do not mistake rd for the new sum.
funct5=00000, funct3=011, and opcode=0101111 identify AMOADD.D; aq/rl bits do not change the arithmetic calculation.
rd receives the old 64-bit memory value before the add; memory receives the low 64-bit result of old value plus rs2.
AMOADD.D is an RV64-only doubleword AMO, and the address must be naturally aligned to 8 bytes.
The 64-bit addition wraps at doubleword width, and the page animation shows the low 64 bits written back to memory.
Common Usage Scenarios
Atomic & Sync
Understand this scenario with real code like «amoadd.d a0, a1, (a2) # a0 = old 64-bit *a2; *a2 = old + a1».
RV64 Operations
Understand this scenario with real code like «amoadd.d a0, a1, (a2) # a0 = old 64-bit *a2; *a2 = old + a1».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
The 64-bit addition wraps modulo 2^64
rd returns the old memory value before the add, not the new sum
Address must be naturally aligned to 8 bytes
RV64 only
aq/rl do not change the addition result
FAQ
Does AMOADD.D trap on addition overflow?
No. The doubleword addition wraps at 64 bits, and the low 64-bit result is written back.