Does AMOADD.W place the added result in rd?
No. AMOADD.W places the old memory value before the add in rd; the low 32-bit added result is written back to memory.
AMOADD.W
RISC-V AMOADD.W Instruction Details
Instruction ManualR-typeAtomically add a 32-bit word: read the old memory value into rd and write old value plus low 32 bits of rs2 back to the same address
Instruction Syntax
amoadd.w rd, rs2, (rs1)
Operand Breakdown
rd: receives the old memory value read atomically; for AMOCAS, its pre-execution value also supplies the compare value.
rs1: directly supplies the atomic-memory address; AMO assembly syntax has no offset immediate field.
rs2: supplies the AMO source data; for AMOCAS, it is the swap value stored when the comparison matches.
AMO-type is this site's presentation label for the AMO-specific R-type field layout: funct5, aq, rl, rs2, rs1, funct3, rd, and the AMO opcode encode the operation.
AZaamoAtomic
Instruction Behavior
AMOADD.W performs an atomic read-modify-write on the 32-bit word addressed by rs1: it reads the old memory value and sign-extends it into rd, adds that old word to the low 32 bits of rs2, and writes the low 32-bit sum back to the same address. The addition wraps as a 32-bit word; aq/rl bits affect memory ordering and do not change the arithmetic result.
AMOADD.W Atomic Decode And Execute Animation
Shows A / Zaamo word atomic field decode, aq/rl ordering bits, a memory read, and RMW state update.
rd
rs2
rs1
amoadd.w,,()
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
00000
funct5
0
aq
0
rl
01011
rs2
01010
rs1
010
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0x00B522AF
opcode
0101111 -> AMO
funct3
010 -> word width
funct5
00000 -> AMOADD.W
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)[31:0]=0x00000003 / a0(x10)=0x00001000
memory read
mem[0x00001000] -> old word 0x00000005
RMW
0x00000005 + 0x00000003 -> 0x00000008
rd / memory
t0(x5) = 0x00000005; mem[0x00001000] = 0x00000008
Current Step
Concept Step: receive the 32-bit atomic instruction encoding
A / Zaamo-extension word atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.
encoding: 0x00B522AF
syntax : amoadd.w t0(x5), a1(x11), (a0(x10))
result : t0(x5) = 0x00000005; mem[0x00001000] = 0x00000008
32-bit Word Addition
old word
0x00000005
rs2 word
0x00000003
low 32-bit sum
0x00000005 + 0x00000003
memory result
0x00000008
AMOADD.W uses full 32-bit word addition and writes the low 32-bit result to memory; this view avoids per-bit equations that would hide the carry chain.
This animation shows ISA-visible atomic read-modify-write, compare-and-swap, LR/SC reservation state, and ordering bits, not any specific CPU cache-coherence implementation, pipeline, or timing.
Quick Understanding & Search Notes
AMOADD.W is commonly used for atomic counter-style updates. It returns the old memory value in rd while writing the 32-bit sum of old value and rs2 back to memory; do not mistake rd for the new sum.
funct5=00000, funct3=010, and opcode=0101111 identify AMOADD.W; aq/rl bits do not change the arithmetic calculation.
rd receives the old memory value before the add; memory receives the low 32-bit result of old value plus the low 32 bits of rs2.
AMOADD.W is a word-width AMO; on RV64, the old word in rd is sign-extended to XLEN.
The 32-bit addition wraps at word width, and the page animation shows the low 32 bits written back to memory.
Normally requires 4-byte natural alignment; alignment is relaxed only when a misaligned atomicity granule PMA is present and all accessed bytes are within one granule.
These read-modify-write effects assume a successful access. With rd=x0, the old-value register write is discarded but memory is still updated. rs2 uses its pre-execution value even when it overlaps rd. The target memory region must support this AMO width and operation.
Common Usage Scenarios
Atomic & Sync
Successful 32-bit access example: a2=0x1000, old memory=5, a1=3; amoadd.w a0, a1, (a2) returns a0=5 and updates memory to 8. The address is naturally aligned and the region supports this AMO.
32-bit Atomic Operations
Successful 32-bit access example: a2=0x1000, old memory=5, a1=3; amoadd.w a0, a1, (a2) returns a0=5 and updates memory to 8. The address is naturally aligned and the region supports this AMO.
Pre-Use Checklist
Syntax Check
- rd, rs2, and rs1 select x0–x31 or their ABI names; syntax is rd, rs2, (rs1), with no rs3 or offset immediate.
- Check funct5 for the operation and funct3 for access width; aq/rl are separate ordering bits, not a fixed funct7 constant.
Semantic Check
- Check natural alignment or the misaligned atomicity granule PMA condition; the target region must support this AMO width and operation.
- On success, rd receives old memory and the computed result goes to memory; rd=x0 discards only register writeback. On RV64, AMO.W sign-extends the old word and uses only rs2[31:0].
Pitfalls / Common Confusions
Overflow wraps around (mod 2^32)
Return value is the old value before add
AMO.W atomically accesses a 32-bit word; on RV64, the old value loaded into rd is sign-extended to XLEN.
AMO.W exists in RV32 and RV64 A/Zaamo environments; it is not RV64-only.
Normally requires a 4-byte naturally aligned address; alignment is relaxed only when a misaligned atomicity granule PMA is present and all accessed bytes are within one granule.
FAQ
Does AMOADD.W trap on addition overflow?
No. The word addition wraps at 32 bits, and the low 32-bit result is written back.