Does AMOAND.B return the post-operation value?
No. Like A-extension AMOs, rd receives the old value loaded from memory.
AMOAND.B
RISC-V AMOAND.B Instruction Details
Instruction ManualAMO-typeAtomic byte AND: rd = *rs1 (sign-ext), *rs1 &= rs2[7:0]
Instruction Syntax
amoand.b rd, rs2, (rs1)
Syntax is rd, rs2, (rs1). The three fields select x0–x31 or ABI names, with no offset immediate or rs3.
funct5=01100, funct3=000, opcode=0101111; aq at bit26 and rl at bit25 are independent ordering bits.
RV32/RV64 Zabha (requires Zaamo): rd receives the sign-extended old 8-bit memory value; only the low 8 rs2 bits compute new memory.
The region must support this AMO width and operation. Every byte address is naturally aligned.
Sources use pre-execution values; rd=x0 discards register writeback while memory read-modify-write still occurs. aq/rl orders only the accessed memory/I/O domain.
ZabhaAtomic
Related Search Terms
Instruction Behavior
AMOAND.B is a Zabha instruction that depends on Zaamo. It atomically loads a byte from the address in rs1 into rd (sign-extended), ANDs with the low byte of rs2, and stores back. It supports aq/rl bits.
AMOAND.B Atomic Decode And Execute Animation
Shows Zabha (requires Zaamo) byte atomic field decode, aq/rl ordering bits, a memory read, and RMW state update.
rd
rs2
rs1
amoand.b,,()
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
01100
funct5
0
aq
0
rl
01011
rs2
01010
rs1
000
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0x60B502AF
opcode
0101111 -> AMO
funct3
000 -> byte width
funct5
01100 -> AMOAND.B
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)[7:0]=0x0F / a0(x10)=0x00001000
memory read
mem[0x00001000] -> old byte 0xF0
RMW
Not computed
rd / memory
t0(x5) = unspecified initial value; mem[0x00001000] = 0xF0
Current Step
Concept Step: receive the 32-bit atomic instruction encoding
Zabha depends on Zaamo; Zabha-extension byte atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.
encoding: 0x60B502AF
syntax : amoand.b t0(x5), a1(x11), (a0(x10))
Pending result : Not computed
Current architectural state
t0(x5) = unspecified initial value; mem[0x00001000] = 0xF0
Assumes Zabha and Zaamo at the selected XLEN, successful fetch, a region supporting this width and operation, and a successful access. A misaligned halfword requires the stated PMA condition. Sources use pre-execution values; aq/rl orders only the accessed domain. Steps are a teaching sequence.
Quick Understanding & Search Notes
AMOAND.B is a Zabha 8-bit atomic AND instruction. It atomically reads the old memory value, performs the read-modify-write at 8-bit width, and writes the sign-extended old value to rd.
Only the 8-bit subword is operated on; upper bits of rs2 are ignored.
rd receives the old memory value sign-extended to XLEN, not the newly updated value.
The natural-alignment requirement for a byte operand is one byte, so every byte address is naturally aligned.
aq/rl orders only the accessed memory/I/O domain: aq provides acquire, rl provides release, and both clear adds no ordering. Cross-domain ordering needs FENCE.
Common Usage Scenarios
Atomic read-modify-write
RV32/RV64 Zabha+Zaamo, a1=0x1000, old memory=5 and a2=3, with a successful access in a supporting region: amoand.b a0, a2, (a1) returns a0=5 and writes 1 to the 8-bit operand.
Pre-Use Checklist
Syntax Check
- Syntax is rd, rs2, (rs1). The three fields select x0–x31 or ABI names, with no offset immediate or rs3.
- funct5=01100, funct3=000, opcode=0101111; aq at bit26 and rl at bit25 are independent ordering bits.
Semantic Check
- RV32/RV64 Zabha (requires Zaamo): rd receives the sign-extended old 8-bit memory value; only the low 8 rs2 bits compute new memory.
- The region must support this AMO width and operation. Every byte address is naturally aligned.
- Sources use pre-execution values; rd=x0 discards register writeback while memory read-modify-write still occurs. aq/rl orders only the accessed memory/I/O domain.
Pitfalls / Common Confusions
rd returns old memory value (sign-extended to XLEN), not the operation result
AMOAND.B applies bitwise AND only at 8-bit width between the old memory value and rs2[7:0], then writes the target byte.
The natural-alignment requirement for a byte operand is one byte, so every byte address is naturally aligned.
FAQ
Can AMOAND.B affect neighboring bytes?
Architecturally it modifies only the byte operand; Zabha provides native byte-granule atomic read-modify-write operations.