Does AMOSWAP.H zero-extend rd?
No. Zabha AMO.H sign-extends the old value into rd; the U in AMOMINU.H/AMOMAXU.H only means unsigned comparison.
AMOSWAP.H
RISC-V AMOSWAP.H Instruction Details
Instruction ManualAMO-typeAMOSWAP.H atomically reads the old halfword, sign-extends it into rd, and writes the low 16 bits of rs2 to the target halfword.
Instruction Syntax
amoswap.h rd, rs2, (rs1)
Syntax is rd, rs2, (rs1). The three fields select x0–x31 or ABI names, with no offset immediate or rs3.
32-bit encoding: funct5=00001, funct3=001, opcode=0101111; aq is bit26 and rl is bit25.
RV32/RV64 Zabha (requires Zaamo): rd receives sign-extended old 16-bit memory; memory receives the low 16 rs2 bits.
The region must support this AMO width and operation. Use two-byte alignment, or a PMA with all accessed bytes in one misaligned atomicity granule; otherwise address-misaligned or access-fault is raised.
Sources use pre-execution values; rd=x0 discards only register writeback and memory still undergoes read-modify-write. aq/rl orders only the accessed memory/I/O domain; suffixes are .aq, .rl and .aqrl.
ZabhaAtomic
Instruction Behavior
AMOSWAP.H is a Zabha (and therefore Zaamo) halfword AMO. It atomically reads the old 16-bit value at rs1, sign-extends it into rd, then writes rs2[15:0] there; aq/rl annotate memory ordering.
AMOSWAP.H Atomic Decode And Execute Animation
Shows Zabha (requires Zaamo) halfword atomic field decode, aq/rl ordering bits, a memory read, and RMW state update.
rd
rs2
rs1
amoswap.h,,()
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
00001
funct5
0
aq
0
rl
01011
rs2
01010
rs1
001
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0x08B512AF
opcode
0101111 -> AMO
funct3
001 -> halfword width
funct5
00001 -> AMOSWAP.H
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)[15:0]=0x0003 / a0(x10)=0x00001000
memory read
mem[0x00001000] -> old halfword 0x0005
RMW
Not computed
rd / memory
t0(x5) = unspecified initial value; mem[0x00001000] = 0x0005
Current Step
Concept Step: receive the 32-bit atomic instruction encoding
Zabha depends on Zaamo; Zabha-extension halfword atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.
encoding: 0x08B512AF
syntax : amoswap.h t0(x5), a1(x11), (a0(x10))
Pending result : Not computed
Current architectural state
t0(x5) = unspecified initial value; mem[0x00001000] = 0x0005
Assumes Zabha and Zaamo at the selected XLEN, successful fetch, a region supporting this width and operation, and a successful access. A misaligned halfword requires the stated PMA condition. Sources use pre-execution values; aq/rl orders only the accessed domain. Steps are a teaching sequence.
Quick Understanding & Search Notes
AMOSWAP.H is a Zabha halfword AMO: it atomically reads the old 16-bit memory value, sign-extends that old value into rd, and writes the low 16 bits of rs2 to the target halfword.
The encoding uses AMO major opcode 0101111, funct3=001 for halfword width, and funct5 to select the specific AMO operation.
All AMO.H forms write the sign-extended old halfword to rd; the unsigned suffix only changes min/max comparison interpretation.
Zabha depends on Zaamo; rs2 contributes only its low 16 bits. Normally the address is naturally aligned to 2 bytes; with a qualifying misaligned atomicity granule PMA, it does not raise an exception solely for address alignment. aq/rl only affect memory-ordering semantics.
Common Usage Scenarios
Atomic & Sync
RV32/RV64 Zabha+Zaamo, a1=0x1000, old memory=5 and a2=3; assuming a supporting region and successful access, a0 receives old value 5 and the 16-bit memory operand becomes 3.
Pre-Use Checklist
Syntax Check
- Syntax is rd, rs2, (rs1). The three fields select x0–x31 or ABI names, with no offset immediate or rs3.
- 32-bit encoding: funct5=00001, funct3=001, opcode=0101111; aq is bit26 and rl is bit25.
Semantic Check
- RV32/RV64 Zabha (requires Zaamo): rd receives sign-extended old 16-bit memory; memory receives the low 16 rs2 bits.
- The region must support this AMO width and operation. Use two-byte alignment, or a PMA with all accessed bytes in one misaligned atomicity granule; otherwise address-misaligned or access-fault is raised.
- Sources use pre-execution values; rd=x0 discards only register writeback and memory still undergoes read-modify-write. aq/rl orders only the accessed memory/I/O domain; suffixes are .aq, .rl and .aqrl.
Pitfalls / Common Confusions
rd receives the old memory halfword sign-extended to XLEN, not the newly written memory value.
Only the low 16 bits of rs2 participate in the halfword computation; upper rs2 bits do not affect this AMO.H data result.
Only the target halfword is modified; do not read AMOSWAP.H as a word or doubleword swap.
Normally the target address is naturally aligned to 2 bytes; when a misaligned atomicity granule PMA is present and all accessed bytes lie in one granule, it does not raise an exception solely for address alignment. aq/rl does not change the data computation.
FAQ
How much memory does AMOSWAP.H modify?
Architecturally it modifies only the target 16-bit halfword and computes the new memory value at halfword width; neighboring bytes are not part of that data result.