AMOXOR.D

RISC-V AMOXOR.D Instruction Details

Instruction ManualR-type

RV64 atomic 64-bit doubleword XOR: rd returns the old memory value, while memory receives oldDoubleword ^ rs2Doubleword

Instruction Syntax

amoxor.d rd, rs2, (rs1)
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
AZaamoAtomic Operation

Instruction Behavior

AMOXOR.D performs an atomic read-modify-write on the 64-bit doubleword addressed by rs1: it first reads the old memory doubleword into rd, then computes oldDoubleword ^ rs2Doubleword using XOR semantics and writes the 64-bit result back to the same address. The operation uses matching bit positions from the old doubleword and the rs2 doubleword. aq/rl bits affect memory ordering only; they do not change the data result.

AMOXOR.D Atomic Decode And Execute Animation

Shows A-extension doubleword atomic field decode, aq/rl ordering bits, memory read, and RMW state update.

rd
rs2
rs1
amoxor.d
,
,(
)
Execution Context
31..27
26
25
24..20
19..15
14..12
11..7
6..0
00100
funct5
0
aq
0
rl
01011
rs2
01010
rs1
011
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0x20B532AF
opcode
0101111 -> AMO
funct3
011 -> doubleword width
funct5
00100 -> AMOXOR.D
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)=0x0F0F0F0F0F0F0F0F / a0(x10)=0x00001000
memory read
mem[0x00001000] -> old doubleword 0xAAAAAAAAAAAAAAAA
RMW
0xAAAAAAAAAAAAAAAA ^ 0x0F0F0F0F0F0F0F0F -> 0xA5A5A5A5A5A5A5A5
rd / memory
t0(x5) = 0xAAAAAAAA; mem[0x00001000] = 0xA5A5A5A5A5A5A5A5
Current Step

Concept Step: receive the 32-bit atomic instruction encoding

A-extension doubleword atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.

encoding: 0x20B532AF
syntax : amoxor.d t0(x5), a1(x11), (a0(x10))
result : t0(x5) = 0xAAAAAAAA; mem[0x00001000] = 0xA5A5A5A5A5A5A5A5
64-bit Doubleword Result View
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
old doubleword
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
rs2 doubleword
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
^
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-

This animation shows ISA-visible atomic read-modify-write, compare-and-swap, LR/SC reservation state, and ordering bits, not any specific CPU cache-coherence implementation, pipeline, or timing.

Quick Understanding & Search Notes

AMOXOR.D is an RV64 64-bit AMO.D read-modify-write instruction. rd always returns the old doubleword before the operation; only the result of oldDoubleword ^ rs2Doubleword is written back to memory, so keep old-value return separate from memory update.

funct5=00100, funct3=011, and opcode=0101111 identify AMOXOR.D; aq/rl bits do not change the data calculation.
rd receives the old 64-bit memory doubleword before the operation; memory receives the 64-bit result computed by this AMO.D instruction.
AMOXOR.D is an RV64-only doubleword AMO, and the address must be naturally aligned to 8 bytes.
AMOXOR.D is a 64-bit bitwise logical AMO; each result bit comes from the same bit position of the old doubleword and the rs2 doubleword.

Common Usage Scenarios

Bit Operations & Masks

Understand this scenario with real code like «amoxor.d a0, a1, (a2) # a0 = *a2; *a2 ^= a1 (64-bit)».

Atomic & Sync

Understand this scenario with real code like «amoxor.d a0, a1, (a2) # a0 = *a2; *a2 ^= a1 (64-bit)».

RV64 Operations

Understand this scenario with real code like «amoxor.d a0, a1, (a2) # a0 = *a2; *a2 ^= a1 (64-bit)».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

rd holds the old 64-bit memory value before the operation, not the new XOR memory result.
AMOXOR.D is an RV64-only doubleword AMO, and the address must be naturally aligned to 8 bytes.
Memory receives the 64-bit result of oldDoubleword ^ rs2Doubleword; do not apply the 32-bit AMO.W sign-extension rule.
aq/rl constrain memory ordering only; they do not change this AMO.D instruction's data result.

FAQ

Does AMOXOR.D place the new memory result in rd?

No. AMOXOR.D places the old 64-bit memory value before the operation in rd; the result of oldDoubleword ^ rs2Doubleword is written back to memory.

Do aq/rl bits change the XOR result of AMOXOR.D?

No. aq/rl only affect memory-ordering constraints; they do not change this AMO.D instruction's 64-bit data result.