Does AMOXOR.W place the new memory result in rd?
No. AMOXOR.W places the old memory word before the operation in rd; the result of oldWord ^ rs2LowWord is written back to memory.
AMOXOR.W
RISC-V AMOXOR.W Instruction Details
Instruction ManualR-typeAtomic 32-bit word bitwise XOR: rd returns the old memory word, while memory receives the 32-bit result of oldWord ^ rs2LowWord
Instruction Syntax
amoxor.w rd, rs2, (rs1)
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
AZaamoAtomic
Instruction Behavior
AMOXOR.W performs an atomic read-modify-write on the 32-bit word addressed by rs1: it first reads the old memory word and sign-extends it into rd, then bitwise-XORs the old word with the low 32 bits of rs2. The resulting 32-bit word is written back to the same address. aq/rl bits affect memory ordering only; they do not change the bitwise XOR data result.
AMOXOR.W Atomic Decode And Execute Animation
Shows A-extension word atomic field decode, aq/rl ordering bits, memory read, and RMW state update.
rd
rs2
rs1
amoxor.w,,()
Execution Context
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00100
funct5
0
aq
0
rl
01011
rs2
01010
rs1
010
funct3
00101
rd
0101111
opcode
Atomic Data Path
instruction
0x20B522AF
opcode
0101111 -> AMO
funct3
010 -> word width
funct5
00100 -> AMOXOR.W
aq / rl
0/0 -> unordered
rd / rs2 / rs1
t0(x5) / a1(x11)=0x0F0F0F0F / a0(x10)=0x00001000
memory read
mem[0x00001000] -> old word 0xAAAAAAAA
RMW
0xAAAAAAAA ^ 0x0F0F0F0F -> 0xA5A5A5A5
rd / memory
t0(x5) = 0xAAAAAAAA; mem[0x00001000] = 0xA5A5A5A5
Current Step
Concept Step: receive the 32-bit atomic instruction encoding
A-extension word atomic instructions use a 32-bit encoding; the animation starts by splitting the fields.
encoding: 0x20B522AF
syntax : amoxor.w t0(x5), a1(x11), (a0(x10))
result : t0(x5) = 0xAAAAAAAA; mem[0x00001000] = 0xA5A5A5A5
32-bit Word Result View
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This animation shows ISA-visible atomic read-modify-write, compare-and-swap, LR/SC reservation state, and ordering bits, not any specific CPU cache-coherence implementation, pipeline, or timing.
Quick Understanding & Search Notes
AMOXOR.W is used for atomic bit toggling. The value returned in rd is always the old memory word; the new 32-bit word after the bitwise XOR operation is written only to memory.
funct5=00100, funct3=010, and opcode=0101111 identify AMOXOR.W; aq/rl bits do not change the data calculation.
rd receives the old memory word before the operation; memory receives the 32-bit result of oldWord ^ rs2LowWord.
AMO.W is a word-width AMO; on RV64, the old word in rd is sign-extended to XLEN.
AMOXOR.W is a bitwise word operation; each result bit comes from the same bit position of the old word and rs2 low word.
Common Usage Scenarios
Atomic & Sync
Understand this scenario with real code like «amoxor.w a0, a1, (a2) # a0 = old *a2; *a2 = old ^ a1».
Bit Operations & Masks
Understand this scenario with real code like «amoxor.w a0, a1, (a2) # a0 = old *a2; *a2 = old ^ a1».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
rd holds the old memory word before the operation, not the new bitwise XOR memory result.
AMO.W atomically accesses a 32-bit word; on RV64, the old word loaded into rd is sign-extended to XLEN.
Only the low 32-bit word of rs2 participates in the calculation, and memory receives a 32-bit word result.
aq/rl constrain memory ordering only; they do not change the value of oldWord ^ rs2LowWord.
FAQ
Do aq/rl bits change the bitwise XOR result of AMOXOR.W?
No. aq/rl only affect memory-ordering constraints; they do not change this AMO.W instruction's 32-bit data result.