Does C.OR have an immediate?
No. Both sources are x8–x15, and rd' receives their XLEN-bit bitwise OR.
C.OR
RISC-V C.OR Instruction Details
Instruction ManualC-typeBitwise OR of rd' and rs2', write to rd'. CA format.
Instruction Syntax
c.or rd', rs2'
Operand Breakdown
RV32/RV64 C/Zca; 16-bit CA format.
Three-bit rd'/rs1' and rs2' select x8–x15; the destination is also the first source.
No immediate: compute XLEN-bit bitwise OR, equivalent to or rd', rd', rs2'.
Overlapping sources read the same pre-writeback value; x0 is outside the encodable register subset.
CCompressed Instruction
Instruction Behavior
C.OR (CA format, x8-x15 only) computes bitwise OR of rd' and rs2', writes to rd'. Expands to or rd',rd',rs2'.
C.OR Decode & Execute Animation
Shows only ISA-visible 16-bit encoding, operands, and state, not a pipeline, cache, or timing.
c.or,
Execution context
x10 <- 0x00F0000F | 0x0000FF00 = 0x00F0FF0F
16-bit encoding fields
15..10
funct6
100011
9..7
rd'/rs1'
010
6..5
funct2
10
4..2
rs2'
011
1..0
op
01
Execution data path
Compressed operand mapping
rd'/rs1'=010 -> x(8+2)=x10, rs2'=011 -> x(8+3)=x11; read values before writeback
Concrete calculation
The Calculate stage shows the equation for the current inputs.
Architectural result
Continue to Commit result to reveal architectural state.
Quick Understanding & Search Notes
C.OR uses the CA format: rd'/rs1' and rs2' each map to x8-x15, and the result is written to rd'.
The CA format has no immediate; its two 3-bit compressed-register fields select rd'/rs1' and rs2'.
C.OR performs XLEN-wide bitwise OR and writes the result back to rd'.
Common Usage Scenarios
Bit Operations & Masks
RV32/RV64 C/Zca, x8=0xf0 and x9=0x0f: c.or x8, x9 writes x8=0xff.
Pre-Use Checklist
Syntax Check
- RV32/RV64 C/Zca; 16-bit CA format.
- Three-bit rd'/rs1' and rs2' select x8–x15; the destination is also the first source.
Semantic Check
- No immediate: compute XLEN-bit bitwise OR, equivalent to or rd', rd', rs2'.
- Overlapping sources read the same pre-writeback value; x0 is outside the encodable register subset.
Pitfalls / Common Confusions
Only x8-x15 registers (CA format, 3-bit register fields)
There is no immediate operand; rd' is both source and destination
FAQ
May both operands name the same register?
Yes. Both read the same old value, so OR leaves that register value unchanged.