Is it always equivalent to a same-named 32-bit instruction?
Not always. Some C/Zc instructions compress common 32-bit operations, while others have dedicated stack-frame or table-jump semantics.
CM.JALT
RISC-V CM.JALT Instruction Details
Instruction ManualC-typeIndirect jump via table, save return address
Instruction Syntax
cm.jalt index
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
ZcmtJump & Control TransferCompressed Instruction
Instruction Behavior
CM.JALT (Zcmt) decodes only for index 32-255. It fetches an instruction-memory table entry at the JVT CSR base plus index<<2 on RV32 or index<<3 on RV64, writes pc+2 to x1 (ra), then writes the entry with bit 0 cleared to pc. Only jvt.mode=0 defines this behavior; a reserved mode makes the instruction reserved. It reuses c.fsdsp encodings, is incompatible with Zcd, and Zcmt depends on Zca and Zicsr.
CM.JALT Decode & Execute Animation
Shows only official compressed fields, conditions, and architectural state; it does not model a pipeline, cache, or timing.
cm.jalt
Execution context
Zcmt table entries follow current data endianness and are fetched as instruction memory; JVT base must be at least 64-byte aligned.
ra <- 0x00001002; PC <- 0x80001000
16-bit encoding fields
15..13
funct3
101
12..10
fixed
000
9..2
index
00100000
1..0
op
10
Execution data path
CM.JALT has 8-bit index=32 in bits[9:2]; it is at least 32, so decodes as this instruction.
0x00002080 = 0x00002000 + (32 << 2); PC' = 0x80001001 & ~1 = 0x80001000
ra <- 0x00001002; PC <- 0x80001000
Architectural state has not been committed.
Quick Understanding & Search Notes
CM.JALT uses index 32-255 to select a JVT entry, links pc+2 to ra, and jumps to the entry address with bit 0 cleared.
index<32 decodes as CM.JT; CM.JALT requires index 32-255.
Only jvt.mode=0 defines table jump; a fault on either implicit fetch does not commit the ordinary jump.
Common Usage Scenarios
Branch & Jump
Understand this scenario with real code like «cm.jalt 32 # jump-and-link via table entry 32».
Compressed & Code Size
Understand this scenario with real code like «cm.jalt 32 # jump-and-link via table entry 32».
Function Call & Return
Understand this scenario with real code like «cm.jalt 32 # jump-and-link via table entry 32».
Pre-Use Checklist
Syntax Check
- Verify the 16-bit compressed encoding is only available on CPUs supporting the C extension.
- Confirm rd/rs1'/rs2' fields map to x8–x15.
Semantic Check
- Note the limited operand space of compressed instructions.
- Verify this compressed instruction has a corresponding 32-bit expansion.
Pitfalls / Common Confusions
index must be 32-255; 0-31 decodes as CM.JT.
jvt.mode must be 0; a reserved mode makes the instruction reserved.
The entry is fetched as instruction memory, bit 0 of the target is cleared, and the link is pc+2.
FAQ
Why do register restrictions matter?
Many 16-bit encodings can represent only a compressed register subset or fixed registers such as sp, ra, a0/a1.