Is it always equivalent to a same-named 32-bit instruction?
Not always. Some C/Zc instructions compress common 32-bit operations, while others have dedicated stack-frame or table-jump semantics.
CM.JT
RISC-V CM.JT Instruction Details
Instruction ManualC-typeIndirect jump via table
Instruction Syntax
cm.jt index
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
ZcmtJump & Control TransferCompressed Instruction
Instruction Behavior
CM.JT (Zcmt) looks up target address from JVT CSR table by index and jumps to it. Table entries are XLEN-bit addresses. Reuses c.fsdsp encoding, incompatible with Zcd (C+D). Part of Zcmt, depends on Zca and Zicsr.
Quick Understanding & Search Notes
CM.JT is the 16-bit encoding form for compressed table jump; its semantics and encodable register/immediate ranges must be read from the official Zc extension rules.
Compressed instructions often restrict register sets, immediate encodings, or destination registers; illegal combinations can be reserved.
Examples show assembly intent; actual encoding constraints follow the official C/Zc tables.
Common Usage Scenarios
Branch & Jump
Understand this scenario with real code like «cm.jt 3 # jump via table entry 3».
Compressed & Code Size
Understand this scenario with real code like «cm.jt 3 # jump via table entry 3».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is C-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Incompatible with Zcd (reuses c.fsdsp encoding)
Requires JVT CSR configuration
Does not save return address (not a call)
FAQ
Why do register restrictions matter?
Many 16-bit encodings can represent only a compressed register subset or fixed registers such as sp, ra, a0/a1.