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DRET

RISC-V DRET Instruction Details

Instruction ManualI-type

Debug-mode return: PC<-dpc and resume with the dcsr-recorded prv/v state (and pelp where applicable). It is defined only in D-mode and not when executing from the Program Buffer.

Instruction Syntax

dret
Operand Breakdown
No explicit assembly operands; the debug specification recommends encoding 0x7b200073.
Has meaning only in D-mode outside the Program Buffer; do not infer a fixed exception elsewhere.
Restore PC from dpc and resume the mode specified by dcsr.prv/v; restore ELP from pelp where applicable.
Resume below M clears MPRV; Zicfilp, Smdbltrp and Ssdbltrp updates follow the debug-resume conditions.
DebugSystem & Privileged

Extension condition: Debug return under the Sdext debug specification; the recommended DRET mechanism has meaning only in D-mode outside the Program Buffer.

Related Search Terms
DRET instructionRISC-V DRETdret syntaxdret encodingdret Debugdret privilegeddebug-mode return

Instruction Behavior

DRET is used by the Debug Module to resume normal execution. Its recommended encoding is 0x7b200073; execution restores PC from dpc and resumes normally at the privilege indicated by dcsr.prv and dcsr.v, restoring ELP from pelp where applicable. DRET is defined only in D-mode and not when executing from the Program Buffer; behavior in other contexts is not specified by this DRET definition.

Quick Understanding & Search Notes

Debug-mode return: PC<-dpc and resume with the dcsr-recorded prv/v state (and pelp where applicable). It is defined only in D-mode and not when executing from the Program Buffer.

DRET's recommended encoding is 0x7b200073, and PC is restored from dpc.
Normal execution resumes from dcsr.prv and dcsr.v, with ELP restored from pelp where applicable; it is not the interrupt-enable restore sequence of mret or sret.
It is defined only in D-mode and not from the Program Buffer; do not infer an exception or platform policy for undefined contexts.
Debug resume below M clears mstatus.MPRV. Zicfilp ELP/pelp and double-trap state update under their applicable conditions.
The RISC-V Debug Specification, Version 1.0, Revised 2025-02-21: Ratified, §4.8 and Appendix A.2

Common Usage Scenarios

Debugger return

Only in D-mode outside the Program Buffer: with prepared dpc=0x8000, dcsr.prv=M and v=0, dret resumes at PC=0x8000 in M-mode under the debug-resume rules. It is not the SRET/MRET interrupt-enable restore sequence.

Hardware breakpoint resume

Only in D-mode outside the Program Buffer: with prepared dpc=0x8000, dcsr.prv=M and v=0, dret resumes at PC=0x8000 in M-mode under the debug-resume rules. It is not the SRET/MRET interrupt-enable restore sequence.

Pre-Use Checklist

Syntax Check
  • No explicit assembly operands; the debug specification recommends encoding 0x7b200073.
  • Has meaning only in D-mode outside the Program Buffer; do not infer a fixed exception elsewhere.
Semantic Check
  • Restore PC from dpc and resume the mode specified by dcsr.prv/v; restore ELP from pelp where applicable.
  • Resume below M clears MPRV; Zicfilp, Smdbltrp and Ssdbltrp updates follow the debug-resume conditions.

Pitfalls / Common Confusions

The debug specification gives a recommended encoding; this is not a normal user-mode instruction.
It has meaning only in D-mode outside the Program Buffer; do not infer a fixed exception for other contexts.
Resuming below M clears MPRV; ELP, MDT and SDT follow the debug specification conditions.

FAQ

Is it a normal user-mode instruction?

No. DRET is defined only in D-mode and not when executing from the Program Buffer; it is not a user-mode assembly instruction.

Which architectural state does DRET restore?

PC is restored from dpc; normal execution resumes according to dcsr.prv and dcsr.v, with ELP restored from pelp where applicable. The specification does not define it as the interrupt-enable restoration sequence of mret or sret.