Does FCLASS.D set NV?
No. The official FCLASS semantics state that it does not set floating-point exception flags.
Classifies a double-precision value into a 10-bit one-hot mask in an integer register.
Syntax: fclass.d rd, rs1; rd selects integer x0–x31 and rs1 selects FP f0–f31. There is no rs2 or rounding operand. D 2.2 depends on F and works on RV32/RV64.
32-bit OP-FP: funct7=1110001 (funct5=11100, fmt=01), rs2=00000, funct3=001, opcode=1010011.
The double-precision class result is a ten-bit one-hot mask; other bits are zero. rd=x0 discards the mask. No fflags are set, including for sNaN, and no rounding occurs.
With FLEN>64, invalid NaN-boxing is classified as a double canonical NaN (bit9). The animation fixes FLEN=64 and initial fflags=0; decimal-to-binary64 text conversion is not instruction rounding.
FCLASS.D examines the double-precision FP encoding in f[rs1] and writes a 10-bit one-hot class mask to x[rd]. Bits 0..9 identify negative infinity, negative normal, negative subnormal, negative zero, positive zero, positive subnormal, positive normal, positive infinity, signaling NaN, and quiet NaN; other rd bits are cleared and FP exception flags are not set.
Shows the D-extension double-precision OP-FP flow: decode fields, read FP operands, perform FCLASS semantics, then write rd.
The word is split as an R-type OP-FP instruction; double-precision OP-FP instructions use opcode 1010011.
FCLASS writes a 10-bit one-hot class mask and clears the other rd bits; classifying NaNs does not set FP exception flags. The text NaN example is shown as quiet NaN; the official signaling-NaN bit is bit 8.
FCLASS writes a 10-bit one-hot class mask and clears the other rd bits; classifying NaNs does not set FP exception flags. The text NaN example is shown as quiet NaN; the official signaling-NaN bit is bit 8.
Assumes D and FS are enabled; fixes FLEN=64 and initial fflags=0. Decimal text first represents a binary64 source value; finite values, signed zeros, infinities, qNaN and sNaN are supported. FCLASS.D does not round or change fflags. The mask is written to integer rd; rd=x0 discards it and x0 stays zero. Steps are teaching views.
This animation shows only D-extension ISA-visible OP-FP encoding, example numeric results, and fflags relationship; it does not model FPU pipelines, latency, every IEEE 754 corner case, or microarchitecture.
FCLASS.D describes an FP value class with an integer mask, useful for software tests of zero, subnormal values, infinity, and NaN.
fclass.d x10, f0 # f0 = -0.0 => x10 = 0x008; fflags unchanged. Initialize the stated source values and enable the listed extension and relevant state; the comment gives the result derived from this page's rules.
fclass.d x10, f0 # f0 = -0.0 => x10 = 0x008; fflags unchanged. Initialize the stated source values and enable the listed extension and relevant state; the comment gives the result derived from this page's rules.
No. The official FCLASS semantics state that it does not set floating-point exception flags.
No. The result is a 10-bit one-hot class mask representing the specific FP class.
No. rd is an integer register holding the class mask.