Does FCLASS.D set NV?
No. The official FCLASS semantics state that it does not set floating-point exception flags.
FCLASS.D
RISC-V FCLASS.D Instruction Details
Instruction ManualR-typeClassifies a double-precision FP value and writes the official 10-class one-hot mask to integer register rd.
Instruction Syntax
fclass.d rd, rs1
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
DFloating-Point Compare
Instruction Behavior
FCLASS.D examines the double-precision FP encoding in f[rs1] and writes a 10-bit one-hot class mask to x[rd]. Bits 0..9 identify negative infinity, negative normal, negative subnormal, negative zero, positive zero, positive subnormal, positive normal, positive infinity, signaling NaN, and quiet NaN; other rd bits are cleared and FP exception flags are not set.
FCLASS.D Decode And Execute Animation
Shows the D-extension double-precision OP-FP flow: decode fields, read FP operands, perform FCLASS semantics, then write rd.
rd
rs1
fclass.d
,
Execution Context
FLEN=64 / fmt=D (01)
funct3: floating-point classify
fflags: does not set fflags
31..27
26..25
24..20
19..15
14..12
11..7
6..0
11100
FCLASS
01
fmt=D
00000
rs2
01011
rs1
001
funct3=001
01010
rd
1010011
OP-FP
Execution Data Path
instruction
0xE2059553
opcode
1010011 -> OP-FP
funct5/fmt
11100 + D(01) -> FCLASS.D
funct3
001 -> floating-point classify
rd/rs
a0(x10) / fa1(f11) / rs2=00000
read
-0.0
FP op
class(-0.0) = 0x008
write
a0(x10) = 0x008; does not set fflags
Current Step
Fetch: show the 32-bit OP-FP encoding
The word is split as an R-type OP-FP instruction; double-precision OP-FP instructions use opcode 1010011.
encoding: 0xE2059553
syntax : fclass.d a0(x10), fa1(f11)
result : a0(x10) = 0x008; does not set fflags
FCLASS writes a 10-bit one-hot class mask and clears the other rd bits; classifying NaNs does not set FP exception flags. The text NaN example is shown as quiet NaN; the official signaling-NaN bit is bit 8.
Double-precision Calculation
rs1
fa1(f11) = -0.0
result
class(-0.0) = 0x008
FCLASS mask bits
bit 0
-inf
bit 1
negative normal
bit 2
negative subnormal
bit 3
-0
bit 4
+0
bit 5
positive subnormal
bit 6
positive normal
bit 7
+inf
bit 8
sNaN
bit 9
qNaN
FCLASS writes a 10-bit one-hot class mask and clears the other rd bits; classifying NaNs does not set FP exception flags. The text NaN example is shown as quiet NaN; the official signaling-NaN bit is bit 8.
This animation shows only D-extension ISA-visible OP-FP encoding, example numeric results, and fflags relationship; it does not model FPU pipelines, latency, every IEEE 754 corner case, or microarchitecture.
Quick Understanding & Search Notes
FCLASS.D describes an FP value class with an integer mask, useful for software tests of zero, subnormal values, infinity, and NaN.
funct5=11100, rs2=00000, and funct3=001 select FCLASS, while fmt selects S/D format.
Exactly one bit of the 10-bit class mask is set; other x[rd] bits are cleared.
FCLASS performs no numeric conversion, no rounding, and sets no fflags.
Common Usage Scenarios
Comparison & Detection
Understand this scenario with real code like «fclass.d x10, f0 # x10 = class of f0 (double)».
Numerical Computing
Understand this scenario with real code like «fclass.d x10, f0 # x10 = class of f0 (double)».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
The result is written to an integer register, not an FP register.
FCLASS returns a one-hot class mask, not a 0/1 comparison result.
FCLASS does not set FP exception flags, including when classifying NaNs.
FAQ
Is the FCLASS.D result a Boolean?
No. The result is a 10-bit one-hot class mask representing the specific FP class.
Is rd a floating-point register for FCLASS.D?
No. rd is an integer register holding the class mask.