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FCLASS.D

RISC-V FCLASS.D Instruction Details

Instruction ManualR-type

Classifies a double-precision value into a 10-bit one-hot mask in an integer register.

Instruction Syntax

fclass.d rd, rs1

Syntax: fclass.d rd, rs1; rd selects integer x0–x31 and rs1 selects FP f0–f31. There is no rs2 or rounding operand. D 2.2 depends on F and works on RV32/RV64.

32-bit OP-FP: funct7=1110001 (funct5=11100, fmt=01), rs2=00000, funct3=001, opcode=1010011.

The double-precision class result is a ten-bit one-hot mask; other bits are zero. rd=x0 discards the mask. No fflags are set, including for sNaN, and no rounding occurs.

With FLEN>64, invalid NaN-boxing is classified as a double canonical NaN (bit9). The animation fixes FLEN=64 and initial fflags=0; decimal-to-binary64 text conversion is not instruction rounding.

DFloating-Point Classify

Instruction Behavior

FCLASS.D examines the double-precision FP encoding in f[rs1] and writes a 10-bit one-hot class mask to x[rd]. Bits 0..9 identify negative infinity, negative normal, negative subnormal, negative zero, positive zero, positive subnormal, positive normal, positive infinity, signaling NaN, and quiet NaN; other rd bits are cleared and FP exception flags are not set.

FCLASS.D Decode And Execute Animation

Shows the D-extension double-precision OP-FP flow: decode fields, read FP operands, perform FCLASS semantics, then write rd.

rd
rs1
fclass.d
,
Execution Context
FLEN=64 / fmt=D (01)
funct3: floating-point classify
fflags: initial 0
31..27
26..25
24..20
19..15
14..12
11..7
6..0
11100
FCLASS
01
fmt=D
00000
rs2
01011
rs1
001
funct3=001
01010
rd
1010011
OP-FP
Execution Data Path
instruction
0xE2059553
opcode
1010011 -> OP-FP
funct5/fmt
11100 + D(01) -> FCLASS.D
funct3
001 -> floating-point classify
rd/rs
a0(x10) / fa1(f11) / rs2=00000
read
Source registers not read yet
FP op
Awaiting Execute
write
Not written yet; initial fflags=0
Current Step

Fetch: show the 32-bit OP-FP encoding

The word is split as an R-type OP-FP instruction; double-precision OP-FP instructions use opcode 1010011.

encoding: 0xE2059553
syntax : fclass.d a0(x10), fa1(f11)
result : Not written yet; initial fflags=0

FCLASS writes a 10-bit one-hot class mask and clears the other rd bits; classifying NaNs does not set FP exception flags. The text NaN example is shown as quiet NaN; the official signaling-NaN bit is bit 8.

Double-precision Calculation
rs1
fa1(f11) = -0.0
result
Awaiting Execute
FCLASS mask bits
bit 0
-inf
bit 1
negative normal
bit 2
negative subnormal
bit 3
-0
bit 4
+0
bit 5
positive subnormal
bit 6
positive normal
bit 7
+inf
bit 8
sNaN
bit 9
qNaN

FCLASS writes a 10-bit one-hot class mask and clears the other rd bits; classifying NaNs does not set FP exception flags. The text NaN example is shown as quiet NaN; the official signaling-NaN bit is bit 8.

Assumes D and FS are enabled; fixes FLEN=64 and initial fflags=0. Decimal text first represents a binary64 source value; finite values, signed zeros, infinities, qNaN and sNaN are supported. FCLASS.D does not round or change fflags. The mask is written to integer rd; rd=x0 discards it and x0 stays zero. Steps are teaching views.

This animation shows only D-extension ISA-visible OP-FP encoding, example numeric results, and fflags relationship; it does not model FPU pipelines, latency, every IEEE 754 corner case, or microarchitecture.

Quick Understanding & Search Notes

FCLASS.D describes an FP value class with an integer mask, useful for software tests of zero, subnormal values, infinity, and NaN.

D 2.2 requires F; use RV32/RV64 with FS enabled. rd is integer x0–x31; rs1 is FP f0–f31.
32-bit OP-FP: funct7=1110001 (funct5=11100, fmt=01), rs2=00000, funct3=001, opcode=1010011; no rounding operand.
The 10-bit class mask is one-hot, with upper bits zero. rd=x0 discards it.
No numeric conversion, rounding or fflags change, including for sNaN. With FLEN>64, an invalid source NaN-box is a double canonical NaN (bit9). The animation fixes FLEN=64.

Common Usage Scenarios

Double-precision class detection

fclass.d x10, f0 # f0 = -0.0 => x10 = 0x008; fflags unchanged. Initialize the stated source values and enable the listed extension and relevant state; the comment gives the result derived from this page's rules.

NaN classification

fclass.d x10, f0 # f0 = -0.0 => x10 = 0x008; fflags unchanged. Initialize the stated source values and enable the listed extension and relevant state; the comment gives the result derived from this page's rules.

Pre-Use Checklist

Syntax Check
  • Syntax: fclass.d rd, rs1; rd selects integer x0–x31 and rs1 selects FP f0–f31. There is no rs2 or rounding operand. D 2.2 depends on F and works on RV32/RV64.
  • 32-bit OP-FP: funct7=1110001 (funct5=11100, fmt=01), rs2=00000, funct3=001, opcode=1010011.
Semantic Check
  • The double-precision class result is a ten-bit one-hot mask; other bits are zero. rd=x0 discards the mask. No fflags are set, including for sNaN, and no rounding occurs.
  • With FLEN>64, invalid NaN-boxing is classified as a double canonical NaN (bit9). The animation fixes FLEN=64 and initial fflags=0; decimal-to-binary64 text conversion is not instruction rounding.

Pitfalls / Common Confusions

The result is written to an integer register, not an FP register.
FCLASS returns a one-hot class mask, not a 0/1 comparison result.
FCLASS does not set FP exception flags, including when classifying NaNs.

FAQ

Does FCLASS.D set NV?

No. The official FCLASS semantics state that it does not set floating-point exception flags.

Is the FCLASS.D result a Boolean?

No. The result is a 10-bit one-hot class mask representing the specific FP class.

Is rd a floating-point register for FCLASS.D?

No. rd is an integer register holding the class mask.