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FCLASS.S

RISC-V FCLASS.S Instruction Details

Instruction ManualR-type

Classify a single-precision FP value and write a 10-bit one-hot class mask to an integer register.

Instruction Syntax

fclass.s rd, rs1
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
FFloating-Point Compare
Related Search Terms
fclass.s instructionRISC-V fclass.sfclass.s syntaxfclass.s encodingfclass.s single-precision FP classifyfclass.s NaN classfclass.s 10-bit mask

Instruction Behavior

FCLASS.S examines the single-precision value in f[rs1] and writes a 10-bit class mask to x[rd]. Bits 0..9 identify negative infinity, negative normal, negative subnormal, negative zero, positive zero, positive subnormal, positive normal, positive infinity, signaling NaN, and quiet NaN. Other rd bits are cleared and FP exception flags are not set.

Quick Understanding & Search Notes

FCLASS.S identifies the FP value class without FP flag side effects; it returns an integer mask rather than a Boolean comparison result.

Mask-bit meanings follow the FCLASS table, separating signed zero, normal/subnormal values, and the two NaN classes.
The instruction performs no rounding and no numeric conversion.
RISC-V Unprivileged ISA Manual: F single-precision floating-point extensionRISC-V Unprivileged ISA Manual: F single-precision floating-point extension

Common Usage Scenarios

FP Type Inspection

Understand this scenario with real code like «fclass.s x10, f0 # x10 = class of f0».

NaN Detection

Understand this scenario with real code like «fclass.s x10, f0 # x10 = class of f0».

Special Value Handling

Understand this scenario with real code like «fclass.s x10, f0 # x10 = class of f0».

Math Library

Understand this scenario with real code like «fclass.s x10, f0 # x10 = class of f0».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

The result is written to an integer register, not a floating-point register.
Exactly one bit is set; it is not a multi-bit attribute set.
FCLASS does not set FP exception flags, including when classifying NaNs.

FAQ

Does FCLASS.S set NV?

No. The official FCLASS rule says it does not set floating-point exception flags.

Is rd a floating-point register for FCLASS.S?

No. rd is an integer register holding the 10-bit class mask.