Does FCLASS.S set NV?
No. The official FCLASS semantics state that it does not set floating-point exception flags.
FCLASS.S
RISC-V FCLASS.S Instruction Details
Instruction ManualOP-FPClassifies a single-precision FP value and writes the official 10-class one-hot mask to integer register rd.
Instruction Syntax
fclass.s rd, rs1
Syntax: fclass.s rd, rs1; integer rd, FP rs1; no rounding operand.
32-bit OP-FP: funct7=1110000, rs2=00000, funct3=001, opcode=1010011. rs2 is a fixed selector, not a second source operand.
RV32/RV64 F 2.2; enable required extensions and FP state. A ten-bit one-hot mask; upper bits zero. No fflags change, even for sNaN, and no rounding.
With FLEN>32, invalid source NaN-boxing becomes canonical NaN. rd=x0 discards the result; fflags stays unchanged. The animation fixes FLEN=32 and quantizes text to an S source; this is not instruction rounding. Initial fflags=0 is an animation assumption; instructions do not clear accrued flags.
FFloating-Point Classify
Instruction Behavior
FCLASS.S examines the single-precision FP encoding in f[rs1] and writes a 10-bit one-hot class mask to x[rd]. Bits 0..9 identify negative infinity, negative normal, negative subnormal, negative zero, positive zero, positive subnormal, positive normal, positive infinity, signaling NaN, and quiet NaN; other rd bits are cleared and FP exception flags are not set. With rd=x0 the mask is discarded. If FLEN>32, invalid source NaN-boxing is classified as a single-precision canonical NaN (bit9).
FCLASS.S Decode And Execute Animation
Shows the F-extension single-precision OP-FP flow: decode fields, read FP operands, perform FCLASS semantics, then write rd.
rd
rs1
fclass.s
,
Execution Context
FLEN=32 / fmt=S (00)
funct3: floating-point classify
fflags: initial 0
31..27
26..25
24..20
19..15
14..12
11..7
6..0
11100
FCLASS
00
fmt=S
00000
rs2
01011
rs1
001
funct3=001
01010
rd
1010011
OP-FP
Execution Data Path
instruction
0xE0059553
opcode
1010011 -> OP-FP
funct5/fmt
11100 + S(00) -> FCLASS.S
funct3
001 -> floating-point classify
rd/rs
a0(x10) / fa1(f11) / rs2=00000
read
Source registers not read yet
FP op
Awaiting Execute
write
Not written yet; initial fflags=0
Current Step
Fetch: show the 32-bit OP-FP encoding
The word is split as an R-type OP-FP instruction; single-precision OP-FP instructions use opcode 1010011.
encoding: 0xE0059553
syntax : fclass.s a0(x10), fa1(f11)
result : Not written yet; initial fflags=0
FCLASS writes a 10-bit one-hot class mask and clears the other rd bits; classifying NaNs does not set FP exception flags. The text nan/qnan selects quiet-NaN bit 9, and snan selects signaling-NaN bit 8. Finite decimal teaching input is quantized to S format before classification.
Single-precision Calculation
rs1
fa1(f11) = -0.0
result
Awaiting Execute
FCLASS mask bits
bit 0
-inf
bit 1
negative normal
bit 2
negative subnormal
bit 3
-0
bit 4
+0
bit 5
positive subnormal
bit 6
positive normal
bit 7
+inf
bit 8
sNaN
bit 9
qNaN
FCLASS writes a 10-bit one-hot class mask and clears the other rd bits; classifying NaNs does not set FP exception flags. The text nan/qnan selects quiet-NaN bit 9, and snan selects signaling-NaN bit 8. Finite decimal teaching input is quantized to S format before classification.
Assumes F and FS enabled; fixes FLEN=32 and initial fflags=0. FCLASS.S does not round or change fflags; it writes the class mask to integer rd, with x0 discarding it and staying zero. Steps are teaching views.
This animation shows only F-extension ISA-visible OP-FP encoding, example numeric results, and fflags relationship; it does not model FPU pipelines, latency, every IEEE 754 corner case, or microarchitecture.
Quick Understanding & Search Notes
FCLASS.S describes an FP value class with an integer mask, useful for software tests of zero, subnormal values, infinity, and NaN.
OP-FP opcode=1010011; funct5=11100, fmt=S=00, rs2=00000, and funct3=001 select FCLASS.S.
Exactly one bit of the 10-bit class mask is set; other x[rd] bits are cleared.
FCLASS performs no numeric conversion, no rounding, and sets no fflags.
Common Usage Scenarios
Class Mask
fclass.s x10, f0 # F enabled; f0=-0.0 -> x10=0x008, fflags unchanged. Enable the listed extensions and FP state and initialize the stated source; the result follows the classification or rounding rules on this page.
NaN Classification
fclass.s x10, f0 # F enabled; f0=-0.0 -> x10=0x008, fflags unchanged. Enable the listed extensions and FP state and initialize the stated source; the result follows the classification or rounding rules on this page.
Signed-Zero Classification
fclass.s x10, f0 # F enabled; f0=-0.0 -> x10=0x008, fflags unchanged. Enable the listed extensions and FP state and initialize the stated source; the result follows the classification or rounding rules on this page.
Pre-Use Checklist
Syntax Check
- Syntax: fclass.s rd, rs1; integer rd, FP rs1; no rounding operand.
- 32-bit OP-FP: funct7=1110000, rs2=00000, funct3=001, opcode=1010011. rs2 is a fixed selector, not a second source operand.
Semantic Check
- RV32/RV64 F 2.2; enable required extensions and FP state. A ten-bit one-hot mask; upper bits zero. No fflags change, even for sNaN, and no rounding.
- With FLEN>32, invalid source NaN-boxing becomes canonical NaN. rd=x0 discards the result; fflags stays unchanged. The animation fixes FLEN=32 and quantizes text to an S source; this is not instruction rounding. Initial fflags=0 is an animation assumption; instructions do not clear accrued flags.
Pitfalls / Common Confusions
The result is written to an integer register, not an FP register.
FCLASS returns a one-hot class mask, not a 0/1 comparison result.
FCLASS does not set FP exception flags, including when classifying NaNs.
FAQ
Is the FCLASS.S result a Boolean?
No. The result is a 10-bit one-hot class mask representing the specific FP class.
Is rd a floating-point register for FCLASS.S?
No. rd is an integer register holding the class mask.