Does FENCE.TSO flush caches?
Its architectural semantics are ordering constraints, not a general cache flush.
FENCE.TSO
RISC-V FENCE.TSO Instruction Details
Instruction ManualI-typeA specific FENCE encoding that orders memory reads and writes in Total Store Order style.
Instruction Syntax
fence.tso
Operand Breakdown
pred/succ: select predecessor and successor operation sets; I/O and memory R/W bits are distinct.
FENCE.TSO is a specific FENCE encoding and has no ordinary register operands.
RV32ICache & Sync
Instruction Behavior
FENCE.TSO is a specific FENCE encoding (fm=1000, pred=RW, succ=RW). It orders memory R/W operations but does not include device I/O bits; compared with FENCE RW,RW, it does not require predecessor stores to be ordered before successor loads. Implementations may execute it as the stronger FENCE RW,RW.
Quick Understanding & Search Notes
FENCE.TSO is the FENCE encoding for TSO-style memory ordering. It covers only R/W memory accesses, not I/O, and deliberately relaxes store-to-load ordering.
fm=1000 with pred=RW and succ=RW is the FENCE.TSO encoding.
Use ordinary FENCE RW,RW when full RW-to-RW ordering is required.
Common Usage Scenarios
Memory Ordering
Understand this scenario with real code like «fence.tso # TSO-style memory ordering for R/W accesses».
Device & IO
Understand this scenario with real code like «fence.tso # TSO-style memory ordering for R/W accesses».
Concurrent Synchronization
Understand this scenario with real code like «fence.tso # TSO-style memory ordering for R/W accesses».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
FENCE.TSO does not order device I/O; use a FENCE with I/O bits when I/O ordering is required.
FENCE.TSO is weaker than FENCE RW,RW because it does not force store-to-load ordering.
Implementations may execute it as the stronger FENCE RW,RW, so do not assume it is always cheaper.
FAQ
Does FENCE.TSO directly execute on other harts?
No. It constrains the order in which the current hart's relevant operations become observable to other observers.