Is it a normal user-mode instruction?
No. These instructions are constrained by privilege level and extension support; user-mode legality must follow the privileged rules.
MNRET
RISC-V MNRET Instruction Details
Instruction ManualI-typeReturn from an Smrnmi RNMI handler: restore pc from mnepc and privilege/virtualization state from mnstatus.
Instruction Syntax
mnret
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
PrivilegedSmrnmiSystem & Privilege
Instruction Encoding
31..20
imm[11:0]
19..15
rs1
14..12
funct3
11..7
rd
6..0
opcode
MNRET uses opcode 1110011 (0x73), funct3 000, funct12 011100000010. The rs1 field selects the source register, the 12-bit immediate provides the second operand, and rd selects the destination.
Format: I-type
opcode: 1110011 (0x73)
funct3: 000 (0x0)
funct12: 011100000010 (0x702)
Instruction Behavior
MNRET is the M-mode-only return instruction added by Smrnmi. It uses mnepc and mnstatus to return to the interrupted program counter, privilege mode, and virtualization mode, sets mnstatus.NMIE, and clears mstatus.MPRV if returning below M-mode.
Quick Understanding & Search Notes
MNRET is a system-level instruction defined by the privileged architecture. This page covers architectural semantics only, not platform firmware policy.
Execution permission, trap type, and state restoration depend on privilege level, relevant CSR bits, and extension presence.
Executing at an unsupported privilege level or without the required extension raises the specified exception.
Common Usage Scenarios
OS Interface
Understand this scenario with real code like «mnret # Return from NMI handler».
System & Privilege
Understand this scenario with real code like «mnret # Return from NMI handler».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Requires Smrnmi and is M-mode only.
It is for resumable non-maskable interrupt handlers, not a general trap return.
MRET and SRET are unaffected by mnstatus.NMIE; use MNRET to resume from RNMI.
FAQ
Does it replace ordinary memory fences?
No. Address translation, instruction fetch, and data-memory ordering use different fence/invalidation instructions.