Does ORC.B access memory?
No. ORC.B reads the source integer register and writes its byte-wise result to the destination integer register.
ORC.B
RISC-V ORC.B Instruction Details
Instruction ManualI-typeBitwise OR-combine, byte granule
Instruction Syntax
orc.b rd, rs
Operand Breakdown
rd: x0–x31; receives the XLEN-wide byte-wise result; writes to x0 are discarded.
rs: integer source register; each zero byte produces 0x00, and each nonzero byte produces 0xFF. Overlap with rd reads the source before writeback.
RV32/RV64, requiring Zbb 1.0; imm[11:0]=001010000111 in the 32-bit I-type encoding is a fixed selector, not an assembly immediate operand.
BZbbBit ManipulationInteger Operation
Instruction Behavior
ORC.B independently OR-combines each byte of rs: an all-zero byte produces an all-zero result byte, while a byte with any set bit produces an all-ones result byte. It is part of Zbb.
ORC.B Decode And Execute Animation
Starts with machine-code field decoding, then shows operand reads, instruction-specific execution, and ISA-visible state update.
rd
rs
orc.b
,
Execution Context
Assumes RV32/RV64 with Zbb enabled, fixed initial register values, and PC=0x2000; instruction fetch succeeds and there are no asynchronous interrupts. These educational steps do not represent processor cycles.
t1(x6)
0x00000014
31..20
19..15
14..12
11..7
6..0
001010000111
imm[11:0]
00110
rs1
101
funct3
00101
rd
0010011
opcode
Execution Data Path
instruction
0x28735293
opcode
0010011 -> OP-IMM
funct3
101 -> ORC.B
rd / rs
t0(x5) / t1(x6)=0x00000014
fixed imm[11:0]
001010000111 -> ORC.B selector (not an arithmetic immediate)
byte-granule OR-combine
Not computed
x5
t0(x5) = 0x00003001; pc = 0x00002000
Current Step
Concept Step: receive the 32-bit instruction encoding
The machine code is split by the current instruction format; the animation starts from encoding/decode.
encoding: 0x28735293
syntax : orc.b t0(x5), t1(x6)
Pending result: Not computed
Current architectural state
t0(x5) = 0x00003001; pc = 0x00002000
This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.
Quick Understanding & Search Notes
ORC.B examines rs byte by byte: a zero byte remains 0x00, while a byte containing any set bit becomes 0xFF; the final XLEN-wide result is written to rd.
Each byte independently becomes all zeros or all ones; the specification gives string processing that tests for a terminating zero byte as a use case.
ORC.B does not combine bits across bytes; each result byte records only whether its corresponding source byte has any set bit.
Common Usage Scenarios
Zero-Byte Detection
Understand this scenario with real code like «orc.b x10, x11 ; each nonzero byte in x11 becomes 0xFF in x10; each zero byte becomes 0x00».
Pre-Use Checklist
Syntax Check
- RV32/RV64 requires enabled Zbb 1.0; register operands select x0–x31.
- Syntax has only rd and rs; imm[11:0]=001010000111 is a fixed selector, with no arithmetic-immediate sign extension.
Semantic Check
- ORC.B examines rs byte by byte: a zero byte remains 0x00, while a byte containing any set bit becomes 0xFF; the final XLEN-wide result is written to rd.
- Overlapping operands read values before writeback; x0 is always zero and writes to x0 are discarded.
Pitfalls / Common Confusions
Each byte is processed independently
FAQ
What is the result width of ORC.B?
ORC.B processes the complete XLEN-wide register value by bytes and writes an equally wide result to rd.