Does ORN access memory?
No. It only reads and writes integer registers; any memory access must be performed by a separate load or store instruction.
ORN
RISC-V ORN Instruction Details
Instruction ManualR-typeOR with inverted operand: rd = rs1 | ~rs2
Instruction Syntax
orn rd, rs1, rs2
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
BZbbZbkbBit ManipulationInteger Operation
Related Search Terms
Instruction Behavior
Bitwise OR of rs1 with the bitwise inversion of rs2: rd = rs1 | ~rs2. Part of Zbb and Zbkb.
ORN Decode And Execute Animation
Starts with machine-code field decoding, then shows operand reads, instruction-specific execution, and ISA-visible state update.
rd
rs1
rs2
orn
,
,
Execution Context
a0(x10)
0x00001000
31..25
24..20
19..15
14..12
11..7
6..0
0100000
funct7
00110
rs2
01010
rs1
110
funct3
00101
rd
0110011
opcode
Execution Data Path
instruction
0x406562B3
opcode
0110011 -> OP
funct3
110 -> ORN
funct7
0100000 -> ORN selector
rs2 / base
t1(x6)=0x00000014 / a0(x10)=0x00001000
S-imm
imm[11:5]|imm[4:0] -> 16; ea=0x00001010 (naturally aligned (4-byte))
store data
select low 32 bits -> 0x00000014
memory
mem[0x00001010] = 0x00000014
Current Step
Concept Step: receive the 32-bit instruction encoding
The machine code is split by the current instruction format; the animation starts from encoding/decode.
encoding: 0x406562B3
syntax : orn t1(x6), 16(a0(x10))
result : mem[0x00001010] = 0x00000014
Architectural Result
mem[0x00001010] = 0x00000014
Bit-by-Bit Logic View
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rs2 (inverted)
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This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.
Quick Understanding & Search Notes
ORN is a B/Zbb instruction for bitwise rs1 OR not rs2. This page is checked against the official B extension semantics, with emphasis on XLEN, W suffixes, .uw suffixes, and bitwise or rotate boundaries.
The second source rs2 is inverted; rs1 is not.
The result is an XLEN-wide bitwise value, not a comparison or conditional branch.
Common Usage Scenarios
Bit Operations & Masks
Understand this scenario with real code like «orn x10, x11, x12 ; x10 = x11 | ~x12».
Crypto & Security
Understand this scenario with real code like «orn x10, x11, x12 ; x10 = x11 | ~x12».
Pre-Use Checklist
Syntax Check
- Verify rd, rs1, rs2 (and rs3) are valid GPRs.
- Confirm funct3 and funct7 encoding is correct.
Semantic Check
- Check if the result affects subsequent branches or address calculations.
- Ensure the rd register is not overwritten by another instruction.
Pitfalls / Common Confusions
Note distinction from regular OR: second operand is inverted first
FAQ
What is the result width of ORN?
ORN computes rs1 | ~rs2 bit by bit across the complete XLEN-wide value and writes an equally wide result to rd.