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SHA512SIG0

RISC-V SHA512SIG0 Instruction Details

Instruction ManualI-type

SHA-512 σ0 function (RV64): ROTR(rs1,1) ^ ROTR(rs1,8) ^ SHR(rs1,7)

Instruction Syntax

sha512sig0 rd, rs1
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
ZknhCrypto & Security

Instruction Behavior

sha512sig0 is the Zknh SHA-512 σ0 function (RV64 only): σ0(x) = ROTR(x, 1) ^ ROTR(x, 8) ^ SHR(x, 7). Reads 64-bit rs1, computes σ0, writes to rd. For SHA-512 message schedule W_t expansion. On RV32, sha512sig0h/sha512sig0l provide the same function split across 32-bit halves.

Quick Understanding & Search Notes

SHA512SIG0 is a Zknh scalar cryptography instruction for SHA-512 RV64 transform. This page is checked against the official scalar crypto extension, avoiding confusion among round functions, key schedule steps, and operand sources.

sha512sig0 is the RV64 SHA-512 lowercase sigma message-schedule transform.
Scalar crypto instructions use integer X registers, and the official spec requires the relevant crypto instructions to be implemented with data-independent execution latency.

Common Usage Scenarios

Crypto & Security

Understand this scenario with real code like «sha512sig0 a0, a1».

Hash Algorithms

Understand this scenario with real code like «sha512sig0 a0, a1».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is I-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

RV64 only. On RV32 use sha512sig0h + sha512sig0l instruction pair.
Rotate/shift amounts: SHA-512 uses (1, 8, 7), different from SHA-256 σ0 (7, 18, 3).
Uses logical right shift (SHR), not arithmetic.

FAQ

Does SHA512SIG0 use floating-point or vector registers?

No. These scalar crypto extension instructions use integer X registers.

Is SHA512SIG0 a complete algorithm implementation?

No. It is a low-level step from AES, SHA, SM3, or SM4; software still combines instructions with the algorithm schedule, round constants, or round keys.