Does SHA512SIG1 use floating-point or vector registers?
No. These scalar crypto extension instructions use integer X registers.
SHA512SIG1
RISC-V SHA512SIG1 Instruction Details
Instruction ManualI-typeSHA-512 σ1 function (RV64): ROTR(rs1,19) ^ ROTR(rs1,61) ^ SHR(rs1,6)
Instruction Syntax
sha512sig1 rd, rs1
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
ZknhCrypto & Security
Instruction Behavior
sha512sig1 implements SHA-512 σ1 (RV64 only): σ1(x) = ROTR(x, 19) ^ ROTR(x, 61) ^ SHR(x, 6). Reads 64-bit rs1, computes σ1, writes to rd. For SHA-512 message schedule. On RV32, sha512sig1h/sha512sig1l provide the split implementation.
Quick Understanding & Search Notes
SHA512SIG1 is a Zknh scalar cryptography instruction for SHA-512 RV64 transform. This page is checked against the official scalar crypto extension, avoiding confusion among round functions, key schedule steps, and operand sources.
sha512sig1 is the RV64 SHA-512 lowercase sigma message-schedule transform.
Scalar crypto instructions use integer X registers, and the official spec requires the relevant crypto instructions to be implemented with data-independent execution latency.
Common Usage Scenarios
Crypto & Security
Understand this scenario with real code like «sha512sig1 a0, a1».
Hash Algorithms
Understand this scenario with real code like «sha512sig1 a0, a1».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
RV64 only. On RV32 use sha512sig1h + sha512sig1l.
Rotate/shift amounts (19, 61, 6) differ from SHA-256 σ1 (17, 19, 10).
FAQ
Is SHA512SIG1 a complete algorithm implementation?
No. It is a low-level step from AES, SHA, SM3, or SM4; software still combines instructions with the algorithm schedule, round constants, or round keys.