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SHA512SUM0

RISC-V SHA512SUM0 Instruction Details

Instruction ManualI-type

SHA-512 Σ0 function (uppercase, RV64): ROTR(rs1,28) ^ ROTR(rs1,34) ^ ROTR(rs1,39)

Instruction Syntax

sha512sum0 rd, rs1
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
ZknhCrypto & Security

Instruction Behavior

sha512sum0 implements SHA-512 compression Σ0 (uppercase) (RV64 only): Σ0(x) = ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39). Reads 64-bit rs1, computes Σ0, writes to rd. For SHA-512 compression A-register update. On RV32, sha512sum0r provides the equivalent.

Quick Understanding & Search Notes

SHA512SUM0 is a Zknh scalar cryptography instruction for SHA-512 RV64 transform. This page is checked against the official scalar crypto extension, avoiding confusion among round functions, key schedule steps, and operand sources.

sha512sum0 is the RV64 SHA-512 uppercase Sigma compression transform.
Scalar crypto instructions use integer X registers, and the official spec requires the relevant crypto instructions to be implemented with data-independent execution latency.

Common Usage Scenarios

Crypto & Security

Understand this scenario with real code like «sha512sum0 a0, a1».

Hash Algorithms

Understand this scenario with real code like «sha512sum0 a0, a1».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is I-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

RV64 only. RV32 uses sha512sum0r.
Rotate amounts (28, 34, 39) differ from SHA-256 Σ0 (2, 13, 22).
Do not confuse Σ0 (uppercase, compression) with σ0 (lowercase, message schedule).

FAQ

Does SHA512SUM0 use floating-point or vector registers?

No. These scalar crypto extension instructions use integer X registers.

Is SHA512SUM0 a complete algorithm implementation?

No. It is a low-level step from AES, SHA, SM3, or SM4; software still combines instructions with the algorithm schedule, round constants, or round keys.