Does SHA512SUM0 use floating-point or vector registers?
No. These scalar crypto extension instructions use integer X registers.
SHA512SUM0
RISC-V SHA512SUM0 Instruction Details
Instruction ManualI-typeSHA-512 Σ0 function (uppercase, RV64): ROTR(rs1,28) ^ ROTR(rs1,34) ^ ROTR(rs1,39)
Instruction Syntax
sha512sum0 rd, rs1
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
ZknhCrypto & Security
Instruction Behavior
sha512sum0 is defined only for RV64. It computes the SHA2-512 Sum0 transform, ROTR64(X(rs1), 28) ^ ROTR64(X(rs1), 34) ^ ROTR64(X(rs1), 39), and writes the 64-bit result to rd. sha512sum0r is the RV32 split form.
SHA512SUM0 Decode And Execute Animation
Bounded teaching inputs execute the official SHA-512 fixed-width bit operations; this does not model a complete algorithm or microarchitecture.
rd
rs1
sha512sum0
,
SHA512SUM0 is defined only for RV64 and operates on the complete 64-bit X(rs1).
fixed selector
source
fixed
destination
OP-IMM
31..20
000100000100
19..15
rs1=x11
14..12
001
11..7
rd=x10
6..0
0010011
Execution Data Path
inb
0x0123456789ABCDEF
ror64(inb, 28)
0x9ABCDEF012345678
ror64(inb, 34)
0xE26AF37BC048D159
ror64(inb, 39)
0xCF13579BDE02468A
result
0xB7C57A100C7EC1AB
Architectural Result
a0(x10) = 0xB7C57A100C7EC1AB
This animation shows only official ISA fields and architectural state; it does not model a complete hash algorithm, pipeline, cache, or timing implementation.
Quick Understanding & Search Notes
SHA512SUM0 is a Zknh scalar cryptography instruction for SHA-512 RV64 transform. This page is checked against the official scalar crypto extension, avoiding confusion among round functions, key schedule steps, and operand sources.
sha512sum0 is the RV64 SHA-512 uppercase Sigma compression transform.
Scalar crypto instructions use integer X registers, and the official spec requires the relevant crypto instructions to be implemented with data-independent execution latency.
Common Usage Scenarios
Crypto & Security
Understand this scenario with real code like «sha512sum0 a0, a1».
Hash Algorithms
Understand this scenario with real code like «sha512sum0 a0, a1».
Pre-Use Checklist
Syntax Check
- Verify the immediate field is within the valid range.
- Confirm source register rs1 points to the correct operand.
Semantic Check
- Check if the immediate sign-extension matches expectations.
- Ensure the result register rd has a clear purpose.
Pitfalls / Common Confusions
RV64 only. RV32 uses sha512sum0r.
Rotate amounts (28, 34, 39) differ from SHA-256 Σ0 (2, 13, 22).
Do not confuse Σ0 (uppercase, compression) with σ0 (lowercase, message schedule).
FAQ
Is SHA512SUM0 a complete algorithm implementation?
No. It implements one SHA2-512 Sum0 transform defined by the manual.