Does SHA512SUM1 use floating-point or vector registers?
No. These scalar crypto extension instructions use integer X registers.
SHA512SUM1
RISC-V SHA512SUM1 Instruction Details
Instruction ManualI-typeSHA-512 Σ1 function (uppercase, RV64): ROTR(rs1,14) ^ ROTR(rs1,18) ^ ROTR(rs1,41)
Instruction Syntax
sha512sum1 rd, rs1
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
ZknhCrypto & Security
Instruction Behavior
sha512sum1 implements SHA-512 compression Σ1 (uppercase) (RV64 only): Σ1(x) = ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41). Reads 64-bit rs1, computes Σ1, writes to rd. For SHA-512 compression E-register update.
Quick Understanding & Search Notes
SHA512SUM1 is a Zknh scalar cryptography instruction for SHA-512 RV64 transform. This page is checked against the official scalar crypto extension, avoiding confusion among round functions, key schedule steps, and operand sources.
sha512sum1 is the RV64 SHA-512 uppercase Sigma compression transform.
Scalar crypto instructions use integer X registers, and the official spec requires the relevant crypto instructions to be implemented with data-independent execution latency.
Common Usage Scenarios
Crypto & Security
Understand this scenario with real code like «sha512sum1 a0, a1».
Hash Algorithms
Understand this scenario with real code like «sha512sum1 a0, a1».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
RV64 only. RV32 uses sha512sum1r.
Rotate amounts (14, 18, 41) differ from SHA-256 Σ1 (6, 11, 25).
FAQ
Is SHA512SUM1 a complete algorithm implementation?
No. It is a low-level step from AES, SHA, SM3, or SM4; software still combines instructions with the algorithm schedule, round constants, or round keys.