RVOPcode
Home/Instructions/SSAMOSWAP-W
SSAMOSWAP.W

RISC-V SSAMOSWAP.W Instruction Details

Instruction ManualR-type

SSAMOSWAP.W performs an AMO-style swap on shadow-stack memory, returning the old value and storing the new value.

Instruction Syntax

ssamoswap.w rd, rs2, (rs1)
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
ZicfissSecurity Mechanisms
Related Search Terms
ssamoswap.w instructionRISC-V ssamoswap.wssamoswap.w syntaxssamoswap.w encodingssamoswap.w shadow-stack atomic swapssamoswap.w CFIssamoswap.w shadow stack

Instruction Behavior

Beginner view: SSAMOSWAP.W atomically reads a value from the shadow-stack location addressed by rs1 into rd and writes the corresponding value from rs2 back to that address. It supports shadow-stack switching and checkpoint maintenance.

Quick Understanding & Search Notes

SSAMOSWAP.W belongs to the RISC-V CFI instruction set; behavior depends on whether Zicfilp/Zicfiss is enabled and on environment configuration.

SSAMOSWAP.W/D use AMO-style read-old/write-new behavior and may use aq/rl consistency semantics.
Do not mistake MOP compatibility for always-active security checks; inactive cases may degrade to no-op or zero-result behavior.
RISC-V Unprivileged ISA Manual: Control-Flow IntegrityRISC-V Unprivileged ISA Manual: Zimop/Zcmop May-Be-Operations

Common Usage Scenarios

Data Loading

Understand this scenario with real code like «ssamoswap.w t0, t1, (t2)».

Resource Management

Understand this scenario with real code like «ssamoswap.w t0, t1, (t2)».

Stack & Frame

Understand this scenario with real code like «ssamoswap.w t0, t1, (t2)».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

SSAMOSWAP.W is not a Zimop/Zcmop MOP-compatible no-op; if SSE access control is not satisfied it raises illegal-instruction or virtual-instruction exceptions.
The address must refer to valid shadow-stack memory and be naturally aligned to the operand width; otherwise shadow-stack memory-protection rules apply.
It is an AMO-like operation with aq/rl release-consistency semantics; do not treat it as an ordinary load/store.
On RV64, SSAMOSWAP.W sign-extends the loaded 32-bit old value to rd; .D is RV64-only.

FAQ

What happens if the related CFI feature is inactive for SSAMOSWAP.W?

Zicfiss instructions degrade according to the official Zimop/Zcmop-compatible behavior and do not perform shadow-stack checks or updates.

What official rule defines SSAMOSWAP.W?

The Control-Flow Integrity chapter of the RISC-V Unprivileged ISA defines LPAD, SSPUSH, SSPOPCHK, SSRDP, and SSAMOSWAP.