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SSAMOSWAP.W

RISC-V SSAMOSWAP.W Instruction Details

Instruction ManualAMO-type

SSAMOSWAP.W performs an AMO-style swap on shadow-stack memory, returning the old value and storing the new value.

Instruction Syntax

ssamoswap.w rd, rs2, (rs1)
Operand Breakdown
rd: receives the old memory value read atomically; for AMOCAS, its pre-execution value also supplies the compare value.
rs1: directly supplies the atomic-memory address; AMO assembly syntax has no offset immediate field.
rs2: supplies the AMO source data; for AMOCAS, it is the swap value stored when the comparison matches.
AMO-type is this site's presentation label for the AMO-specific R-type field layout: funct5, aq, rl, rs2, rs1, funct3, rd, and the AMO opcode encode the operation.
ZicfissSecurity Mechanisms
Related Search Terms
ssamoswap.w instructionRISC-V ssamoswap.wssamoswap.w syntaxssamoswap.w encodingssamoswap.w shadow-stack atomic swapssamoswap.w CFIssamoswap.w shadow stack

Instruction Behavior

Beginner view: SSAMOSWAP.W atomically loads a 32-bit word from the shadow-stack location addressed by rs1 into rd and stores rs2's low 32 bits back to that address. On RV64, the loaded word is sign-extended to rd. It supports shadow-stack switching and checkpoint maintenance.

SSAMOSWAP.W Decode & Execute Animation

Shows only specification-defined encodings, conditions, and architectural state.

ssamoswap.w a0, a1, (a2)
Execution Context
Instruction Encoding
31..27
funct5
01001
26/25
aq/rl
00
24..20
rs2
a1
19..15
rs1
a2
14..12
funct3
010
11..7
rd
a0
6..0
opcode
0101111 AMO
Decode fixed fields
x[a2]=0x0000000000002000, x[a1]=0x0000000012345678, mem[address]=0x89ABCDEF
x[a0] <- 0xFFFFFFFF89ABCDEF; mem[0x0000000000002000] <- 0x12345678
Architectural state has not been committed.

Quick Understanding & Search Notes

SSAMOSWAP.W is a Zicfiss shadow-stack AMO; its SSE access conditions are controlled by the current privilege environment.

SSAMOSWAP.W/D use AMO-style read-old/write-new behavior and may use aq/rl consistency semantics.
SSAMOSWAP.W/D are not MOP encodings; unsatisfied SSE conditions take their specified exception paths.
RISC-V Unprivileged ISA Manual: Control-Flow IntegrityRISC-V Unprivileged ISA Manual: Zimop/Zcmop May-Be-Operations

Common Usage Scenarios

Data Loading

Understand this scenario with real code like «ssamoswap.w t0, t1, (t2)».

Resource Management

Understand this scenario with real code like «ssamoswap.w t0, t1, (t2)».

Stack & Frame

Understand this scenario with real code like «ssamoswap.w t0, t1, (t2)».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is AMO-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

SSAMOSWAP.W is not a Zimop/Zcmop MOP-compatible no-op; failure of the manual's listed SSE or S-mode conditions raises an illegal-instruction or virtual-instruction exception, while an M-mode memory access raises a store/AMO access-fault.
Zicfiss depends on the Zicsr, Zimop, and Zaamo extensions.
Activating Zicfiss in M-mode is not supported, and U-mode use requires S-mode to be implemented.
SSAMOSWAP.W's rs1 address must be naturally aligned to the word's four-byte width; if it is not naturally aligned, the same exception options as A-extension AMOs apply.
It is an AMO-like operation with aq/rl release-consistency semantics; do not treat it as an ordinary load/store.
The accessed memory must be idempotent; non-idempotent memory or insufficient PMP read/write permission raises a store/AMO access-fault. SSAMOSWAP.W additionally requires AMOSwap-level PMA support.
On RV64, SSAMOSWAP.W sign-extends the loaded 32-bit old value to rd; .D is RV64-only.

FAQ

What happens if the related CFI feature is inactive for SSAMOSWAP.W?

SSAMOSWAP.W is an AMO encoding, not a Zimop/Zcmop MOP. If its SSE access-control or S-mode conditions are not met, it takes the specified illegal-instruction or virtual-instruction exception path.

What official rule defines SSAMOSWAP.W?

The Control-Flow Integrity chapter of the RISC-V Unprivileged ISA defines LPAD, SSPUSH, SSPOPCHK, SSRDP, and SSAMOSWAP.