Does divide by zero trap?
No. The V extension defines the divide-by-zero result and the instruction itself does not raise a divide-by-zero exception.
Divide each signed vs2 element by x[rs1], quotient to vd; division by zero does not trap.
VDIV.VX performs RVV signed integer division and writes the quotient to vd. Division by zero does not trap and returns the specified quotient; signed overflow cases follow the specified result.
VDIV.VX is element-wise integer division. It follows the RISC-V integer-division style of not trapping on divide-by-zero, which makes it usable in vectorized quotient loops.
Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vdiv.vx v1, v2, a1».
Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vdiv.vx v1, v2, a1».
No. The V extension defines the divide-by-zero result and the instruction itself does not raise a divide-by-zero exception.