RISC-V bleu Pseudo-Instruction Details
Assembler pseudo-instructionUnsigned less-or-equal branch pseudo-instruction. It swaps source registers and uses BGEU: bleu rs1, rs2, offset is equivalent to bgeu rs2, rs1, offset.
What This Pseudo Instruction Is Saving You From Writing
Base RISC-V branches provide a compact set such as equal/not-equal and less-than/greater-or-equal; this pseudo-instruction swaps operands or compares with x0 so source code matches the programmer condition.
Official Semantics Checklist
How To Read The Expansion
What You May See In objdump / Disassembly
Official References And Reading Order
This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.
When To Think Of It First
Pitfalls / Common Confusions
FAQ
Is bleu a real RISC-V instruction?
bleu is an assembler pseudo-instruction or alias, not a separate hardware opcode. The “Typical Real Expansion” section lists the official expansion, and behavior is defined by the expanded ISA instructions.
What is the main trap when using bleu?
This is an unsigned comparison; negative two’s-complement values are treated as large unsigned numbers