j

RISC-V j Pseudo-Instruction Details

Assembler pseudo-instruction

RISC-V j is written as j offset in the RISC-V Assembly Programmer's Manual and expands to jal x0, offset. The Unprivileged ISA identifies J as the JAL assembler pseudo-instruction with rd=x0.

What You Write
j offset
Typical Real Expansion
jal x0, offset

What This Pseudo Instruction Is Saving You From Writing

j is the shorter assembler spelling of jal x0, offset.

How To Read The Expansion

Step 1
The assembler writes j offset as jal x0, offset.
Step 2
JAL writes the next instruction address to rd; here rd is x0.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

Pitfalls / Common Confusions

j uses x0 as JAL's destination register, so the link address is discarded.

FAQ

Is j a separate hardware opcode?

No. j is an assembler pseudo-instruction for jal x0, offset.